參數(shù)資料
型號(hào): HYS72T256020HFA
廠商: QIMONDA
英文描述: 240-Pin Fully-Buffered DDR2 SDRAM Modules
中文描述: 240針全緩沖DDR2內(nèi)存模組
文件頁(yè)數(shù): 6/47頁(yè)
文件大?。?/td> 1378K
代理商: HYS72T256020HFA
HYS72T[64/128/256]4[00/20]HFA–[2.5/3S/3.7]–B
Fully-Buffered DDR2 SDRAM Modules
Internet Data Sheet
Rev.1.01, 2007-06-20
10062006-RQWY-GI6S
6
2
Pin Configuration
The pin configuration of the DDR2 SDRAM DIMM is listed by function in
Table 5
(240 pins). The abbreviations used in columns
Pin and Buffer Type are explained in
Table 6
and
Table 7
respectively. The pin numbering is depicted in
Figure 1
.
TABLE 5
Pin Configuration of FB-DIMM
Pin#
Nam
e
Pin
Type
Buffer
Type
Function
Clock Signals
228
229
Control Signals
17
SCK
SCK
I
I
HSDL_15
HSDL_15
System Clock Input, positive line
System Clock Input, negative line
RES
ET
I
LV-CMOS
AMB reset signal
Northbound
22
25
28
31
34
37
51
54
57
60
63
66
48
40
23
26
29
32
35
38
52
55
58
61
64
PN0
PN1
PN2
PN3
PN4
PN5
PN6
PN7
PN8
PN9
PN10 O
PN11 O
PN12 O
PN13 O
PN0
PN1
PN2
PN3
PN4
PN5
PN6
PN7
PN8
PN9
PN10 O
O
O
O
O
O
O
O
O
O
O
HSDL_15
HSDL_15
HSDL_15
HSDL_15
HSDL_15
HSDL_15
HSDL_15
HSDL_15
HSDL_15
HSDL_15
HSDL_15
HSDL_15
HSDL_15
HSDL_15
HSDL_15
HSDL_15
HSDL_15
HSDL_15
HSDL_15
HSDL_15
HSDL_15
HSDL_15
HSDL_15
HSDL_15
HSDL_15
Primary Northbound Data, positive lines
O
O
O
O
O
O
O
O
O
O
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相關(guān)代理商/技術(shù)參數(shù)
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HYS72T256020HFA-3S-B 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Fully-Buffered DDR2 SDRAM Modules
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