參數(shù)資料
型號： HYS72T128001HR
廠商： QIMONDA
英文描述： 240-Pin Registered DDR SDRAM Modules
中文描述： 240針DDR SDRAM內(nèi)存模塊注冊
文件頁數(shù)： 15/40頁
文件大?。?/td> 1050K
代理商： HYS72T128001HR
Internet Data Sheet
Rev. 1.4, 2007-02
03062006-GD6J-14FP
15
HYS72T[128/256]00xHR–[3S/3.7/5]–A
Registered DDR2 SDRAM Modules
3.2
DC Operating Conditions
TABLE 9
Operating Conditions
TABLE 10
Supply Voltage Levels and DC Operating Conditions
Parameter
Symbol
Values
Unit
Note
Min.
Max.
DIMM Module Operating Temperature Range (ambient)
DRAM Component Case Temperature Range
Storage Temperature
Barometric Pressure (operating & storage)
Operating Humidity (relative)
T
OPR
T
CASE
T
STG
P
Bar
H
OPR
0
0
–55
+69
10
+55
+95
+100
+105
90
°
C
°
C
°
C
kPa
%
1)
1) When operating this product in the 85 °C to 95 °C
T
CASE
temperature range, the High Temperature Self Refresh has to be enabled by
setting EMR(2) bit A7 to “1”. When the High Temperature Self Refresh is enabled there is an increase of
I
DD6
by approximately 50 %
2) DRAM Component Case Temperature is the surface temperature in the center on the top side of any of the DRAMs.
3) Within the DRAM Component Case Temperature range all DRAM specification will be supported.
4) Above 85
°
C DRAM case temperature the Auto-Refresh command interval has to be reduced to
t
REFI
= 3.9
μ
s.
5) Self-Refresh period is hard-coded in the DRAMs and therefore it is imperative that the system ensures the DRAM is below 85
°
C case
temperature before initiating self-refresh operation.
6) Up to 3000 m
2)3)4)5)
6)
Parameter
Symbol
Values
Unit
Note
Min.
Typ.
Max.
Device Supply Voltage
Output Supply Voltage
Input Reference Voltage
SPD Supply Voltage
DC Input Logic High
DC Input Logic Low
In / Output Leakage Current
V
DD
V
DDQ
V
REF
V
DDSPD
V
IH(DC)
V
IL (DC
)
I
L
1.7
1.7
0.49
×
V
DDQ
1.7
V
REF
+ 0.125
– 0.30
– 5
1.8
1.8
0.5
×
V
DDQ
—
—
—
—
1.9
1.9
0.51
×
V
DDQ
3.6
V
DDQ
+ 0.3
V
REF
– 0.125
5
V
V
V
V
V
V
μ
A
1)
1) Under all conditions,
V
DDQ
must be less than or equal to
V
DD
2) Peak to peak AC noise on
V
REF
may not exceed ± 2%
V
REF
(DC).
V
REF
is also expected to track noise in
V
DDQ
.
3) Input voltage for any connector pin under test of 0 V
≤
V
IN
≤
V
DDQ
+ 0.3 V; all other pins at 0 V. Current is per pin
2)
3)
相關(guān)PDF資料
PDF描述
HYS72T128001HR-5-A 240-Pin Registered DDR SDRAM Modules
HYS72T256000HR 240-Pin Registered DDR SDRAM Modules
HYS72T256000HR-3.7-A 240-Pin Registered DDR SDRAM Modules
HYS72T256000HR-3S-A 240-Pin Registered DDR SDRAM Modules
HYS72T256000HR-5-A 240-Pin Registered DDR SDRAM Modules
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HYS72T128001HR-5-A 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin Registered DDR SDRAM Modules
HYS72T128020EU-2.5-B2 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin unbuffered DDR2 SDRAM Modules
HYS72T128020EU-25F-B2 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin unbuffered DDR2 SDRAM Modules
HYS72T128020EU-3.7-B2 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin unbuffered DDR2 SDRAM Modules
HYS72T128020EU-3-B2 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:240-Pin unbuffered DDR2 SDRAM Modules
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*