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參數(shù)資料
| 型號(hào)： | HYS72D64500GR-7-B |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | Registered DDR SDRAM-Modules |
| 中文描述： | 注冊(cè)DDR SDRAM內(nèi)存模塊 |
| 文件頁數(shù)： | 6/39頁 |
| 文件大?。?/td> | 1036K |
| 代理商： | HYS72D64500GR-7-B |
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HYS72D[128/64/32]5[00/20/21]GR–[7F/7/8]-B
Registered DDR SDRAM-Modules
Overview
Data Sheet
6
Rev. 1.03 2004-01
1
Overview
1.1
Features
184-Pin Registered 8-Byte Dual-In-Line
DDR SDRAM Module for “1U” PC, Workstation and Server main memory applications
One rank 32M
×
72, 64M
×
72 and two ranks 128M
×
72 organization
JEDEC standard Double Data Rate Synchronous DRAMs (DDR SDRAM) with a single + 2.5 V (
±
0.2 V) power
supply
Built with DDR SDRAMs in 66-Lead TSOPII package
Programmable CAS Latency, Burst Length, and Wrap Sequence (Sequential & Interleave)
Auto Refresh (CBR) and Self Refresh
All inputs and outputs SSTL_2 compatible
Re-drive for all input signals using register and PLL devices.
Serial Presence Detect with E
2
PROM
Low Profile Modules form factor:
133.35 mm
×
30,48 mm (1.2”)
×
4.00 mm
(6,80 mm with stacked components)
Based on JEDEC standard reference card layouts Raw Card L,M,N
Gold plated contacts
1.2
Description
The HYS72D[128/64/32]5[00/20/21]GR–[7F/7/8]-B are low profile versions of the standard Registered DIMM
modules with 1.2” inch (30,48 mm) height for 1U Server Applications. The Low Profile DIMM versions are available
as 32M
×
72 (256MB), 64M
×
72 (512MB) and 128M
×
72 (1 GB).
The memory array is designed with Double Data Rate Synchronous DRAMs for ECC applications. All control and
address signals are re-driven on the DIMM using register devices and a PLL for the clock distribution. This reduces
capacitive loading to the system bus, but adds one cycle to the SDRAM timing. A variety of decoupling capacitors
are mounted on the PC board. The DIMMs feature serial presence detect based on a serial E
2
PROM device using
the 2-pin I
2
C protocol. The first 128 bytes are programmed with configuration data and the second 128 bytes are
available to the customer.
Table 1
Part Number Speed Code
Module Speed Grade
Component Module
max. Clock
Frequency
Performance
–7F
DDR266F
PC2100
143
133
–7
DDR266A
PC2100
143
133
–8
DDR200A
PC1600
125
100
Unit
–
–
MHz
MHz
@ CL = 2.5
@ CL = 2
fCK
fCK
相關(guān)PDF資料 |
PDF描述 |
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| HYS72D128520GR-7-B | Registered DDR SDRAM-Modules |
| HYS72D128520GR-7F-B | Connector Wall Plate; Color:Almond; Leaded Process Compatible:Yes; No. of Ports:2 RoHS Compliant: Yes |
| HYS72D128521GR-7-B | Connector Wall Plate; Color:Electric White; Leaded Process Compatible:Yes; No. of Ports:4 RoHS Compliant: Yes |
| HYS72D32500GR-8-B | Registered DDR SDRAM-Modules |
| HYS72D64500GR-8-B | Registered DDR SDRAM-Modules |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HYS72D64500GR-7F-B | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:Low Profile Registered DDR-I SDRAM-Modules |
| HYS72D64500GR-8 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x72 SDRAM Module |
| HYS72D64500GR-8-A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:?512MB (64Mx72) PC1600 1-bank? |
| HYS72D64500GR-8-B | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:Registered DDR SDRAM-Modules |
| HYS72T128000GR | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:DDR2 Registered Memory Modules |
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