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參數(shù)資料
| 型號(hào)： | HYS72D32300GBR-6-C |
| 廠(chǎng)商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | 184-Pin Registered Double Data Rate SDRAM Module |
| 中文描述： | 184針注冊(cè)雙倍數(shù)據(jù)速率SDRAM模塊 |
| 文件頁(yè)數(shù)： | 11/38頁(yè) |
| 文件大?。?/td> | 1121K |
| 代理商： | HYS72D32300GBR-6-C |
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Data Sheet
11
Rev. 1.0, 2004-03
HYS72D[128/64/32][300/320]GBR–[5/6]–C
Registered Double Data Rate SDRAM
Pin Configuration
3,
11,
18,
26,
34,
42,
50,
58,
66,
74,
81,
89,
93,
100,
116,
124,
132,
139,
145,
152,
160,
176
Other Pins
82
V
SS
GND
–
Ground Plane
V
DDID
O
OD
V
DD
Identification
Note:Pin
indicating
and
connected
PCB
Not connected
Pins not connected on
Infineon RDIMM’s
in
tristate,
V
DD
V
DDQ
nets
on
9,
16,
17,
71,
75,
76,
90,
101,
102,
103,
113,
163,
173
NC
NC
–
Table 3
Pin# Name
Pin Configuration of RDIMM
(cont’d)
Pin
Type
Type
Buffer
Function
Table 4
Abbreviation Description
I
O
I/O
AI
PWR
GND
NU
NC
Abbreviations for Pin Type
Standard input-only pin. Digital levels.
Output. Digital levels.
I/O is a bidirectional input/output signal.
Input. Analog levels.
Power
Ground
Not Usable (JEDEC Standard)
Not Connected (JEDEC Standard)
Table 5
Abbreviation Description
SSTL
LV-CMOS
CMOS
OD
Abbreviations for Buffer Type
Serial Stub Terminalted Logic (SSTL2)
Low Voltage CMOS
CMOS Levels
Open Drain. The corresponding pin has 2
operational states, active low and tristate,
and allows multiple devices to share as a
wire-OR.
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| HYS72D32300GBR-7-B | 制造商:INFINEON 制造商全稱(chēng):Infineon Technologies AG 功能描述:184 - Pin Registered Double Data Rate SDRAM Modules |
| HYS72D32300GBR-7-C | 制造商:QIMONDA 制造商全稱(chēng):QIMONDA 功能描述:184-Pin Registered Double Data Rate SDRAM Module |
| HYS72D32300GU-5-B | 制造商:INFINEON 制造商全稱(chēng):Infineon Technologies AG 功能描述:184-Pin Unbuffered Dual-In-Line Memory Modules |
| HYS72D32300GU-5-C | 制造商:INFINEON 制造商全稱(chēng):Infineon Technologies AG 功能描述:184-Pin Unbuffered Double Data Rate SDRAM |
| HYS72D32300GU-6-B | 制造商:INFINEON 制造商全稱(chēng):Infineon Technologies AG 功能描述:184-Pin Unbuffered Dual-In-Line Memory Modules |
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