參數(shù)資料
型號: HYS72D128521GR-7-B
廠商: INFINEON TECHNOLOGIES AG
英文描述: Connector Wall Plate; Color:Electric White; Leaded Process Compatible:Yes; No. of Ports:4 RoHS Compliant: Yes
中文描述: 注冊DDR SDRAM內(nèi)存模塊
文件頁數(shù): 21/39頁
文件大?。?/td> 1036K
代理商: HYS72D128521GR-7-B
HYS72D[128/64/32]5[00/20/21]GR–[7F/7/8]-B
Registered DDR SDRAM-Modules
SPD Contents
Data Sheet
21
Rev. 1.03 2004-01
4
Table 13
SPD Contents
SPD Codes for HYS72D32500GR–[7F/7/8]-B
P
Label Code
H
×
72
1 rank
reg
PC1600R –
20220
Rev. 0.0
HEX
80
08
07
0D
0A
01
48
00
04
80
80
02
82
08
08
01
0E
04
0C
01
02
26
C0
A0
80
00
H
×
72
1 rank
reg
PC2100R –
20330
Rev. 0.0
HEX
80
08
07
0D
0A
01
48
00
04
70
75
02
82
08
08
01
0E
04
0C
01
02
26
C0
75
75
00
H
×
72
1 rank
reg
PC2100R –
20220
Rev. 0.0
HEX
80
08
07
0D
0A
01
48
00
04
70
75
02
82
08
08
01
0E
04
0C
01
02
26
C0
75
75
00
Jedec SPD Revision
Description
Programmed SPD Bytes in E2PROM
Total number of Bytes in E2PROM
Memory Type (DDR = 07h)
Number of Row Addresses
Number of Column Addresses
Number of DIMM Ranks
Data Width (LSB)
Data Width (MSB)
Interface Voltage Levels
tCK @ CLmax (Byte 18) [ns]
tAC SDRAM @ CLmax (Byte 18) [ns]
Error Correction Support
Refresh Rate
Primary SDRAM Width
Error Checking SDRAM Width
tCCD [cycles]
Burst Length Supported
Number of Banks on SDRAM Device
CAS Latency
CS Latency
Write Latency
DIMM Attributes
Component Attributes
tCK @ CLmax -0.5 (Byte 18) [ns]
tAC SDRAM @ CLmax -0.5 [ns]
tCK @ CLmax -1 (Byte 18) [ns]
Byte#
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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