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| 型號： | HYS72D128520GR-7F-B |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | Connector Wall Plate; Color:Almond; Leaded Process Compatible:Yes; No. of Ports:2 RoHS Compliant: Yes |
| 中文描述： | 注冊DDR SDRAM內(nèi)存模塊 |
| 文件頁數(shù)： | 14/39頁 |
| 文件大?。?/td> | 1036K |
| 代理商： | HYS72D128520GR-7F-B |
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HYS72D[128/64/32]5[00/20/21]GR–[7F/7/8]-B
Registered DDR SDRAM-Modules
Electrical Characteristics
Data Sheet
14
Rev. 1.03 2004-01
3
Electrical Characteristics
3.1
Operating Conditions
Attention: Permanent device damage may occur if “Absolute Maximum Ratings” are exceeded. Functional
operation should be restricted to recommended operation conditions. Exposure to higher than
recommended voltage for extended periods of time affect device reliability
Table 7
Supply Voltage Levels
Parameter
Symbol
Note:
1. Under all conditions,
V
DDQ
must be less than or equal to
V
DD
2. Peak to peak AC noise on
V
REF
may not exceed ± 2%
V
REF (DC)
.
V
REF
is also expected to track noise variations in
V
DDQ
.
3.
V
TT
of the transmitting device must track
V
REF
of the receiving device
.
Table 8
DC Operating Conditions (SSTL_2 Inputs)
(
V
DDQ
= 2.5 V,
T
A
= 70
°
C, Voltage Referenced to
V
SS
)
Parameter
Note:
1. The relationship between the
V
DDQ
of the driving device and the
V
REF
of the receiving device is what determines
noise margins. However, in the case of
V
IH (max.)
(input overdrive), it is the
V
DDQ
of the receiving device that is
referenced. In the case where a device is implemented such that it supports SSTL_2 inputs but has no SSTL_2
outputs (such as a translator), and therefore no
V
DDQ
supply voltage connection, inputs must tolerate input
overdrive to 3.0 V (High corner
V
DDQ
+ 300 mV).
2. For any pin under test input of 0 V
≤
V
IN
≤
V
DDQ
+ 0.3 V. Values are shown per DDR-SDRAM component
Table 6
Parameter
Absolute Maximum Ratings
Symbol
Values
min.
–0.5
–0.5
–55
–
–
Unit
max.
3.6
3.6
+150
1
50
Input/Output voltage relative to
V
SS
Power supply voltage on
V
DD
/
V
DDQ
to
V
SS
Storage temperature range
Power dissipation (per SDRAM component)
Data out current (short circuit)
V
IN,
V
OUT
V
DD,
V
DDQ
T
STG
P
D
I
OS
V
V
o
C
W
mA
Values
min.
2.3
2.3
0.49
×
V
DDQ
V
REF
– 0.04
2.3
Unit/
Notes
nom.
2.5
2.5
0.5
×
V
DDQ
V
REF
2.5
max.
2.7
2.7
0.51
×
V
DDQ
V
REF
+ 0.04
3.6
Device Supply Voltage
Output Supply Voltage
Input Reference Voltage
Termination Voltage
EEPROM supply voltage
V
DD
V
DDQ
V
REF
V
TT
V
DDSPD
V
V 1)
V 2)
V 3)
V
Symbol
Values
min.
V
REF
+0.15
–0.30
–5
–5
Unit/
Notes
max.
V
DDQ
+0.3
V
REF
–
0.15
5
5
DC Input Logic High
DC Input Logic Low
Input Leakage Current
Output Leakage Current
V
IH, (DC)
V
IL, (DC)
I
IL
I
OL
V 1)
V
μ
A 1)
μ
A 2)
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| HYS72D128520GR-8 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x72 SDRAM Module |
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| HYS72D128521GR-7-B | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:Low Profile Registered DDR-I SDRAM-Modules |
| HYS72D128521GR-7F-B | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:Low Profile Registered DDR-I SDRAM-Modules |
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