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參數(shù)資料
| 型號(hào)： | HYS64V4120GU-10 |
| 廠商： | SIEMENS A G |
| 元件分類： | DRAM |
| 英文描述： | 3.3V 4M x 64-Bit 2 BANK SDRAM Module 3.3V 4M x 72-Bit 2 BANK SDRAM Module |
| 中文描述： | 4M X 64 SYNCHRONOUS DRAM MODULE, 8 ns, DMA168 |
| 封裝： | DIMM-168 |
| 文件頁數(shù)： | 10/11頁 |
| 文件大小： | 72K |
| 代理商： | HYS64V4120GU-10 |
HYS64(72)V4120GU-10
4M x 64/72 SDRAM-Module
Semiconductor Group
10
A serial presence detect storage device - E
2
PROM - is assembled onto the module. Information about the module
configuration, speed, etc. is written into the E
2
PROM device during module production using a serial presence
detect protocol ( I
2
C synchronous 2-wire bus)
PD-Table:
Byte#
Description
SPD Entry Value
Hex
x64
-10
80
08
04
0B
09
x72
-10
80
08
04
0B
09
0
1
2
3
4
Number of SPD bytes
Total bytes in Serial PD
Memory Type
Number of Row Addresses (without BS bits)
Number of Column Addresses
(for x8 SDRAM)
Number of DIMM Banks
Module Data Width
Module Data Width (cont’d)
Module Interface Levels
SDRAM Cycle Time at CL=3
SDRAM Access Time from Clock at CL=3
Dimm Config (Error Det/Corr.)
Refresh Rate/Type
128
256
SDRAM
11
9
5
6
7
8
9
2
02
40
00
01
A0
80
00
80
02
48
00
01
A0
80
02
80
64 / 72
0
LVTTL
10.0 ns
8.0 ns
none / ECC
Self-Refresh,
15.6
μ
s
x8
n/a / x8
t
ccd
= 1 CLK
10
11
12
13
14
15
SDRAM width, Primary
Error Checking SDRAM data width
Minimum clock delay for back-to-back ran-
dom column address
Burst Length supported
Number of SDRAM banks
Supported CAS Latencies
08
00
01
08
08
01
16
17
18
1, 2, 4, 8 & full page
2
CAS latency = 1, 2
& 3
CS latency = 0
Write latency = 0
non buffered/non
reg.
Vcc tol +/- 10%
15.0 ns
9.0 ns
30 ns
27 ns
30 ns
20 ns
8F
02
07
8F
02
07
19
20
21
CS Latencies
WE Latencies
SDRAM DIMM module attributes
01
01
00
01
01
00
22
23
24
25
26
27
28
SDRAM Device Attributes :General
SDRAM Cycle Time at CL = 2
SDRAM Access Time from Clock at CL = 2
SDRAM Cylce Time at CL = 1
SDRAM Access Time from Clock at CL = 1
Minimum Row Precharge Time
Minimum Row Active to Row Active delay
tRRD
06
F0
90
78
6C
1E
14
06
F0
90
78
6C
1E
14
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HYS72V4120GU-10 | 3.3V 4M x 64-Bit 2 BANK SDRAM Module 3.3V 4M x 72-Bit 2 BANK SDRAM Module |
| HYS64V4120GU | 3.3V 4M x 64-Bit 2 BANK SDRAM Module 3.3V 4M x 72-Bit 2 BANK SDRAM Module |
| HYS64V64220GBDL | 144 pin SO-DIMM SDRAM Modules |
| HYS64V64220GBDL-7-D | 144 pin SO-DIMM SDRAM Modules |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HYS64V4200GDL-7.5 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x64 SDRAM Module |
| HYS64V4200GU-10 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:3.3V 4M x 64/72-Bit 1 BANK SDRAM Module 3.3V 8M x 64/72-Bit 2 BANK SDRAM Module |
| HYS64V4200GU-8 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:3.3V 4M x 64/72-Bit 1 BANK SDRAM Module 3.3V 8M x 64/72-Bit 2 BANK SDRAM Module |
| HYS64V4200GU-8B | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:3.3V 4M x 64/72-Bit 1 BANK SDRAM Module 3.3V 8M x 64/72-Bit 2 BANK SDRAM Module |
| HYS64V4220GCDL-7.5 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x64 SDRAM Module |
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