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參數(shù)資料
| 型號： | HYMP112S64LMP8-E3 |
| 廠商： | Hynix Semiconductor Inc. |
| 英文描述： | BNC FEMALE TO RCA MALE COUPLER |
| 中文描述： | DDR2 SDRAM的SO - DIMM插槽 |
| 文件頁數(shù)： | 2/17頁 |
| 文件大?。?/td> | 405K |
| 代理商： | HYMP112S64LMP8-E3 |
This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any
responsibility for use of circuits described. No patent licenses are implied.
Rev. 0.1/ July 2004
2
128Mx64 bits
DDR2 SDRAM SO-DIMM
HYMP112S64(L)MP8
DESCRIPTION
Hynix HYMP112S64MP8 series is unbuffered 200-pin double data rate 2 Synchronous DRAM Small Outline Dual In-Line Memory Mod-
ules (DIMMs) which are organized as 128Mx64 high-speed memory arrays. Hynix HYMP112S64MP8 series consists of eight 128Mx8
DDR2 SDRAMs in 63 ball FBGA Dual Die Pacakge(DDP)s. Hynix HYMP112S64MP8 series provide a high performance 8-byte interface
in 67.60mm X 30.00mm form factor of industry standard. It is suitable for easy interchange and addition.
Hynix HYMP512S64MP8 series is designed for high speed and offers fully synchronous operations referenced to both rising and falling
edges of differential clock inputs. While all addresses and control inputs are latched on the rising edges of the clock, Data, Data
strobes and Write data masks inputs are sampled on both rising and falling edges of it. The data paths are internally pipelined and 4-
bit prefetched to achieve very high bandwidth. All input and output voltage levels are compatible with SSTL_1.8. High speed frequen-
cies, programmable latencies and burst lengths allow variety of device operation in high performance memory system.
Hynix HYMP512S64MP8 series incorporates SPD(serial presence detect). Serial presence detect function is implemented via a serial
2,048-bit EEPROM. The first 128 bytes of serial PD data are programmed by Hynix to identify DIMM type, capacity and other the
information of DIMM and the last 128 bytes are available to the customer.
FEATURES
ORDERING INFORMATION
Type
Part No.
Description
CL-tRCD-tRP
Form Factor
PC2-3200 (DDR2-400)
HYMP112S64(L)MP8-E4
2 rank 1GB
Lead-free SO-DIMM
4-4-4
200pin Unbuffered SO-
DIMM
67.60 mm x 30,00 mm
(MO-224)
HYMP112S64(L)MP8-E3
3-3-3
PC2-4300 (DDR2-533)
HYMP112S64(L)MP8-C5
5-5-5
HYMP112S64(L)MP8-C4
4-4-4
1GB (128M x 64) Unbuffered DDR2 SO - DIMM based on
128Mx8 DDR2 DDP SDRAMs
JEDEC standard Double Data Rate2 Synchronous DRAMs
(DDR2 SDRAMs) with 1.8V +/- 0.1V Power Supply
All inputs and outputs are compatible with SSTL_1.8 inter-
face
OCD (Off-Chip Driver Impedance Adjustment) and ODT
(On-Die Termination)
Fully differential clock operations (CK & /CK)
Programmable CAS Latency 3 / 4 /5 supported
Programmable Burst Length 4 / 8 with both sequential and
interleave mode
Auto refresh and self refresh supported
7.8us refresh period at Lower than T
CASE
85
℃
,
3.9us( 85
℃
＜
T
CASE
≤ 95℃)
Serial Presence Detect(SPD) with EEPROM
Lead free product
相關PDF資料 |
PDF描述 |
|---|---|
| HYMP112S64LMP8-E4 | DDR2 SDRAM SO-DIMM |
| HYMP112S64MP8 | SHIELDED, RJ45 TO DB25 ADP, P |
| HYMP112S64MP8-C4 | SCREW LOCKS MALE |
| HYMP112S64MP8-C5 | SCREW LOCKS MALE |
| HYMP112S64MP8-E3 | SCREW LOCKS MALE |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| HYMP112S64LMP8-E4 | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:DDR2 SDRAM SO-DIMM |
| HYMP112S64M8-C4 | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:200pin Unbuffered DDR2 SDRAM SO-DIMMs based on 512 Mb 1st ver. |
| HYMP112S64M8-E3 | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:200pin Unbuffered DDR2 SDRAM SO-DIMMs based on 512 Mb 1st ver. |
| HYMP112S64MP8 | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:DDR2 SDRAM SO-DIMM |
| HYMP112S64MP8-C4 | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:200pin Unbuffered DDR2 SDRAM SO-DIMMs based on 512 Mb 1st ver. |
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