參數(shù)資料
型號(hào): HYB5116405BT-50
廠商: SIEMENS A G
元件分類: DRAM
英文描述: 4M x 4-Bit Dynamic RAM 2k & 4k Refresh
中文描述: 4M X 4 EDO DRAM, 50 ns, PDSO24
文件頁(yè)數(shù): 10/28頁(yè)
文件大?。?/td> 323K
代理商: HYB5116405BT-50
Semiconductor Group
10
HYB5116(7)405BJ/BT-50/-60/-70
4M x 4-EDO DRAM
Hyper Page Mode (EDO) Read-modify-Write Cycle
Hyper page mode (EDO) read-
write cycle time
t
PRWC
58
68
77
ns
CAS precharge to WE
t
CPWD
41
49
56
ns
CAS-before-RAS Refresh Cycle
CAS setup time
t
CSR
t
CHR
t
RPC
t
WRP
10
10
10
ns
CAS hold time
10
10
10
ns
RAS to CAS precharge time
5
5
5
ns
Write to RAS precharge time
10
10
10
ns
Write hold time referenced to RAS
t
WRH
10
10
10
ns
CAS-before-RAS Counter Test Cycle
CAS precharge time
t
CPT
35
40
40
ns
Self Refresh Cycle
RAS pulse width
t
RASS
t
RPS
t
CHS
100k
_
100k
_
100k
_
ns
17
RAS precharge
95
_
110
_
130
_
ns
17
CAS hold time
-50
_
-50
_
-50
_
ns
17
Test Mode
Write command setup time
t
WTS
t
WTH
t
CHRT
10
10
10
ns
Write command hold time
10
10
10
ns
CAS hold time
30
30
30
ns
AC Characteristics
(cont’d)
5)6)
16E
T
A
= 0 to 70 °C,
V
CC
= 5 V
±
10 %,
t
T
= 2 ns
Parameter
Symbol
Limit Values
Unit
Note
-50
-60
-70
min.
max. min.
max. min.
max.
相關(guān)PDF資料
PDF描述
HYB5117405BT-50 4M x 4-Bit Dynamic RAM 2k & 4k Refresh
HYB5116405BT-70 4M x 4-Bit Dynamic RAM 2k & 4k Refresh
HYB5116405BJBT-50- 4M x 4-Bit Dynamic RAM 2k & 4k Refresh
HYB5116405BT-60 4M x 4-Bit Dynamic RAM 2k & 4k Refresh
HYB5117405BT-60 RP12 (A) Series - Powerline Regulated DC-DC Converters; Input Voltage (Vdc): 24V; Output Voltage (Vdc): 12V; 2:1 Wide Input Voltage Range; 12 Watts Output Power; 1.6kVDC Isolation; UL Certified; Over Current Protection; Five-Sided Shield; Standard DIP24 and SMD-Pinning; Efficiency to 88%
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