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參數(shù)資料
| 型號： | HYB511000BJ-50 |
| 廠商： | SIEMENS A G |
| 元件分類： | DRAM |
| 英文描述： | 1 M x 1-Bit Dynamic RAM Low Power 1 M ⅴ 1-Bit Dynamic RAM |
| 中文描述： | 1M X 1 FAST PAGE DRAM, 50 ns, PDSO20 |
| 文件頁數(shù)： | 22/22頁 |
| 文件大?。?/td> | 192K |
| 代理商： | HYB511000BJ-50 |
Semiconductor Group
54
HYB 511000BJ/BJL-50/-60/-70
1 M
×
1-DRAM
Test Mode
The HYB 511000B/BL is the RAM organized 1 048 576 words by 1-bit, it is internally organized
262 144 words by 4-bit. In “Test Mode”, data would be written into a number of sectors (4 sectors)
in parallel and retrieved the same way. If upon reading, all bits are equal (all “H” or “L”), the data
output pin indicates a same data as all bits. In this case, the data output pin indicates an expected
data for good parts, the data output pin indicates a complementary data for bad parts. And also, if
any of the bits differed, the data output pin would indicate a high impedance state for bad parts. The
next figure shows the block diagram including its truth table when “Test Mode” is used.
In test mode, 1M DRAM can be tested as if it were 256K DRAM by the following method.
“Test Mode” function is performed on any of the timing cycles including fast page mode when “TF”
pin is held on “super voltage (
V
CC
+ 4.5 V (
V
CC
= 5 V
±
10 %), max. voltage = 10.5 V)” for the
specified period (
t
TES
,
t
TEHR
and
t
TEHC
; see next figure). The address input of A9 is ignored in the
“Test Mode”. On the other hand, normal operation requires the “TF” pin be connected to
V
IL
(TF)
level, or left unconnected on the printed wiring board. The “Test Mode” function reduces test times
(1/4; in case of using N test pattern).
RAS
CAS
VIH
VIL
VIH
VIL
t
TEHC
TF
VIH,TF
VIL,TF
t
TES
t
TEHR
Test Mode Cycle
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HYB511000BJ-60 | 1 M x 1-Bit Dynamic RAM Low Power 1 M ⅴ 1-Bit Dynamic RAM |
| HYB511000BJ-70 | 1 M x 1-Bit Dynamic RAM Low Power 1 M ⅴ 1-Bit Dynamic RAM |
| HYB511000BJL-50 | 1 M x 1-Bit Dynamic RAM Low Power 1 M ⅴ 1-Bit Dynamic RAM |
| HYB511000BJL-60 | 1 M x 1-Bit Dynamic RAM Low Power 1 M ⅴ 1-Bit Dynamic RAM |
| HYB511000BJ- | 1 M x 1-Bit Dynamic RAM Low Power 1 M ⅴ 1-Bit Dynamic RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HYB511000BJ-60 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:1 M x 1-Bit Dynamic RAM Low Power 1 M ⅴ 1-Bit Dynamic RAM |
| HYB511000BJ-70 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:1 M x 1-Bit Dynamic RAM Low Power 1 M ⅴ 1-Bit Dynamic RAM |
| HYB511000BJ-80 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x1 Fast Page Mode DRAM |
| HYB511000BJL-50 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:1 M x 1-Bit Dynamic RAM Low Power 1 M ⅴ 1-Bit Dynamic RAM |
| HYB511000BJL-60 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:1 M x 1-Bit Dynamic RAM Low Power 1 M ⅴ 1-Bit Dynamic RAM |
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