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參數(shù)資料
| 型號(hào)： | HYB39S256400DCL-75 |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | 256 MBit Synchronous DRAM |
| 中文描述： | 256兆位同步DRAM |
| 文件頁(yè)數(shù)： | 10/22頁(yè) |
| 文件大?。?/td> | 564K |
| 代理商： | HYB39S256400DCL-75 |
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INFINEON Technologies
10
2002-04-23
HYB39S256400/800/160DT(L)/DC(L)
256MBit Synchronous DRAM
Operation Definition
All of SDRAM operations are defined by states of control signals CS, RAS, CAS, WE, and DQM at
the positive edge of the clock. The following list shows the truth table for the operation commands.
Operation
Device
State
Idle
3
CKE
n-1
CKE
n
DQM
BA0
BA1
AP=
A10
Addr
.
CS
RAS
CAS
WE
Bank Active
H
X
X
V
V
V
L
L
H
H
Bank Precharge
Any
H
X
X
V
L
X
L
L
H
L
Precharge All
Any
Active
3
Active
3
Active
3
Active
3
H
X
X
X
H
X
L
L
H
L
Write
H
X
X
V
L
V
L
H
L
L
Write with Autoprecharge
H
X
X
V
H
V
L
H
L
L
Read
H
X
X
V
L
V
L
H
L
H
Read with Autoprecharge
H
X
X
V
H
V
L
H
L
H
Mode Register Set
Idle
H
X
X
V
V
V
L
L
L
L
No Operation
Any
H
X
X
X
X
X
L
H
H
H
Burst Stop
Active
H
X
X
X
X
X
L
H
H
L
Device Deselect
Any
H
X
X
X
X
X
H
X
X
X
Auto Refresh
Idle
H
H
X
X
X
X
L
L
L
H
Self Refresh Entry
Idle
H
L
X
X
X
X
L
L
L
H
Self Refresh Exit
Idle
(Self
Refr.)
L
H
X
X
X
X
H
X
X
X
L
H
H
X
Clock Suspend Entry
Active
H
L
X
X
X
X
X
X
X
X
Power Down Entry
(Precharge or active
standby)
Idle
H
L
X
X
X
X
H
X
X
X
Active
4
L
H
H
H
Clock Suspend Exit
Active
L
H
X
X
X
X
X
X
X
X
Power Down Exit
Any
(Power
Down)
L
H
X
X
X
X
H
X
X
X
L
H
H
L
Data Write/Output Enable
Active
H
X
L
X
X
X
X
X
X
X
Data Write/Output Disable
Active
H
X
H
X
X
X
X
X
X
X
Notes
1. V = Valid, x = Don’t Care, L = Low Level, H = High Level
2. CKEn signal is input level when commands are provided, CKEn-1 signal is input level one clock before the
commands are provided.
3. This is the state of the banks designated by BA0, BA1 signals.
4. Power Down Mode can not be entered in a burst cycle. When this command asserted in the burst mode cycle
device is in clock suspend mode.
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| HYB39S256400DCL-8 | 256 MBit Synchronous DRAM |
| HYB39S256400DT | 256 MBit Synchronous DRAM |
| HYB39S256400DT-6 | 256 MBit Synchronous DRAM |
| HYB39S256400DT-7 | 256 MBit Synchronous DRAM |
| HYB39S256400DT-75 | 256 MBit Synchronous DRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HYB39S256400DCL-8 | 制造商:INFINEON 制造商全稱(chēng):Infineon Technologies AG 功能描述:256-MBit Synchronous DRAM |
| HYB39S256400DT | 制造商:INFINEON 制造商全稱(chēng):Infineon Technologies AG 功能描述:256 MBit Synchronous DRAM |
| HYB39S256400DT-6 | 制造商:INFINEON 制造商全稱(chēng):Infineon Technologies AG 功能描述:256-MBit Synchronous DRAM |
| HYB39S256400DT-7 | 制造商:Infineon Technologies AG 功能描述: |
| HYB39S256400DT-7.5 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:?256Mb (64Mx4) PC133 3-3-3? |
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