參數(shù)資料
型號(hào): HYB39S256400DCL-6
廠商: INFINEON TECHNOLOGIES AG
英文描述: 256-MBit Synchronous DRAM
中文描述: 256兆位同步DRAM
文件頁數(shù): 11/28頁
文件大?。?/td> 630K
代理商: HYB39S256400DCL-6
HYB39S256[40/80/16]0D[C/T](L)
256-MBit Synchronous DRAM
Pin Configuration
Data Sheet
11
Rev. 1.02, 2004-02
10072003-13LE-FGQQ
2.4
Block Diagrams
Figure 2
Block Diagram for 64M x 4 SDRAM (13/11/2 addressing)
M em ory
Array
Bank 1
8192
x 2048
x 4 Bit
M em ory
Array
Bank 2
8192
x 2048
x 4 Bit
M em ory
Array
Bank 3
8192
x 2048
x 4 Bit
SPB 04127_2
Colum n Address
Counter
Row
Decoder
M em ory
Array
Bank 0
8196
x 2048
x 4 Bit
C
S
Row
Decoder
S
Row
Decoder
Row
Decoder
C
S
Row Address
Buffer
Colum n Address
Buffer
Refresh Counter
S
A0 - A12,
BA0, BA1
A0 - A9, A11, AP,
BA0, BA1
Colum n Addresses
Row Addresses
Input Buffer
O utput Buffer
D Q 0 - DQ 3
Control Logic &
Tim ing G enerator
C
C
C
R
C
W
D
C
C
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