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參數(shù)資料
| 型號： | HYB25R72180C-745 |
| 英文描述： | RAMBUS DRAM |
| 中文描述： | Rambus的內(nèi)存 |
| 文件頁數(shù)： | 25/76頁 |
| 文件大?。?/td> | 1218K |
| 代理商： | HYB25R72180C-745 |
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2002-05-06
Page 25 of 76
HYB25D128400/800/160AT(L)
128-Mbit Double Data Rate SDRAM
Data from any Read burst may be truncated with a Burst Terminate command, as shown on
Terminating a
Read Burst: CAS Latencies (Burst Length = 8)
on page 26. The Burst Terminate latency is equal to the read
(CAS) latency, i.e. the Burst Terminate command should be issued x cycles after the Read command, where
x equals the number of desired data element pairs.
Data from any Read burst must be completed or truncated before a subsequent
W
rite command can be
issued. If truncation is necessary, the Burst Terminate command must be used, as shown on
Read to Write:
CAS Latencies (Burst Length = 4 or 8)
on page 27. The example is shown for t
DQSS
(min). The t
DQSS
(max)
case, not shown here, has a longer bus idle time. t
DQSS
(min) and t
DQSS
(max) are defined in the section on
W
rites.
A Read burst may be followed by, or truncated with, a Precharge command to the same bank (provided that
Auto Precharge was not activated). The Precharge command should be issued x cycles after the Read com-
mand, where x equals the number of desired data element pairs (pairs are required by the 2n prefetch archi-
tecture). This is shown on
Read to Precharge: CAS Latencies (Burst Length = 4 or 8)
on page 28 for Read
latencies of 2 and 2.5. Following the Precharge command, a subsequent command to the same bank cannot
be issued until t
RP
is met.
N
ote that part of the row precharge time is hidden during the access of the last data
elements.
In the case of a Read being executed to completion, a Precharge command issued at the optimum time (as
described above) provides the same operation that would result from the same Read burst with Auto Pre-
charge enabled. The disadvantage of the Precharge command is that it requires that the command and
address busses be available at the appropriate time to issue the command. The advantage of the Precharge
command is that it can be used to truncate bursts.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HYB25R72180C-750 | RAMBUS DRAM |
| HYB25D128400AT-8 | ?128Mb (32Mx4) DDR200 (2-2-2)? |
| HYB25D128800AT-7 | ?128Mb (16mx8) DDR266A (2-3-3)? |
| HYB25D128800AT-8 | ?128Mb (16Mx8) DDR200 (2-2-2)? |
| HYB25D128800T-7 | ?128Mb (16Mx8) DDR 266A (2-3-3)? |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HYB3116160BSJ | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:1M x 16-Bit Dynamic RAM 1k & 4k -Refresh |
| HYB3116160BSJ-50 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:1M x 16-Bit Dynamic RAM 1k & 4k -Refresh |
| HYB3116160BSJ-60 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:1M x 16-Bit Dynamic RAM 1k & 4k -Refresh |
| HYB3116160BSJ-70 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:1M x 16-Bit Dynamic RAM 1k & 4k -Refresh |
| HYB3116160BST-50 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:1M x 16-Bit Dynamic RAM 1k & 4k -Refresh |
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