參數(shù)資料
型號： HYB25D512160AT-8
英文描述： ?512Mb (32Mx16) DDR200 (2-2-2)?
中文描述： ？的512Mb（32Mx16）DDR200（2-2-2）？
文件頁數(shù)： 17/76頁
文件大?。?/td> 1218K
代理商： HYB25D512160AT-8
2002-05-06
Page 17 of 76
HYB25D128400/800/160AT(L)
128-Mbit Double Data Rate SDRAM
Truth Table 1a: Commands
N
ame (Function)
CS
RAS
CAS
WE
Address
M
NE
N
otes
Deselect (
N
op)
H
X
X
X
X
N
OP
1,
9
N
o Operation (
N
op)
L
H
H
H
X
N
OP
1,
9
Active (Select Bank And Activate Row)
L
L
H
H
Bank/Row
ACT
1, 3
Read (Select Bank And Column, And Start Read Burst)
L
H
L
H
Bank/Col
Read
1, 4
W
rite (Select Bank And Column, And Start
W
rite Burst)
L
H
L
L
Bank/Col
W
rite
1, 4
Burst Terminate
L
H
H
L
X
BST
1, 8
Precharge (Deactivate Row In Bank Or Banks)
L
L
H
L
Code
PR
E
1, 5
Auto Refresh Or Self Refresh (
E
nter Self Refresh Mode)
L
L
L
H
X
AR / SR
1, 6, 7
Mode Register Set
L
L
L
L
Op-Code
MRS
1, 2
1. CK
E
is
H
I
GH
for all commands shown except Self Refresh.
2. BA0, BA1 select either the Base or the
E
xtended Mode Register (BA0 = 0, BA1 = 0 selects Mode Register; BA0 = 1, BA1 = 0
selects
E
xtended Mode Register; other combinations of BA0-BA1 are reserved; A0-A11 provide the op-code to be written to the
selected Mode Register.)
3. BA0-BA1 provide bank address and A0-A11 provide row address.
4. BA0, BA1 provide bank address; A0-A
i
provide column address (where
i
= 8 for x16,
i
=
9
for x8 and
9
, 11 for x4); A10
H
I
GH
enables the Auto Precharge feature (nonpersistent), A10 LO
W
disables the Auto Precharge feature.
5. A10 LO
W
: BA0, BA1 determine which bank is precharged.
A10
H
I
GH
: all banks are precharged and BA0, BA1 are “Don’t Care.”
6. This command is AUTO R
E
FR
E
S
H
if CK
E
is
H
I
GH
; Self Refresh if CK
E
is LO
W
.
7. Internal refresh counter controls row and bank addressing; all inputs and I/Os are “Don’t Care” except for CK
E
.
8. Applies only to read bursts with Auto Precharge disabled; this command is undefined (and should not be used) for read bursts with
Auto Precharge enabled or for write bursts
9
. Deselect and
N
OP are functionally interchangeable.
Truth Table 1b: DM Operation
N
ame (Function)
DM
DQs
N
otes
W
rite
E
nable
L
Valid
1
W
rite Inhibit
H
X
1
1. Used to mask write data; provided coincident with the corresponding data.
相關(guān)PDF資料
PDF描述
HYB25D512400AR-7 ?512Mb (stacked 256Mb) ?
HYB25D512400AT-8 ?512Mb (128Mx4) DDR200 (2-2-2) ?
HYB25D512800AT-6 ?512Mb (64Mx8) DDR333 (2.5-3-3)?
HYB25D512800AT-7 ?512Mb (64Mx8) DDR266A (2-3-3)?
HYB25D512800AT-8 ?512Mb (64Mx8) DDR200 (2-2-2)?
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HYB25D512400BR-7 制造商:Infineon Technologies AG 功能描述:128M X 4 DDR DRAM MODULE, P66 Pin Plastic SMT
HYB25D512400CE-5 制造商:Infineon Technologies AG 功能描述:
HYB25D512800CE-5 功能描述:IC DDR SDRAM 512MBIT 66TSOP RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:- 標(biāo)準(zhǔn)包裝:60 系列:- 格式 - 存儲器:EEPROMs - 串行 存儲器類型:EEPROM 存儲容量:16K (2K x 8) 速度:2MHz 接口:SPI 3 線串行 電源電壓:2.5 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:8-PDIP 包裝:管件 產(chǎn)品目錄頁面:1449 (CN2011-ZH PDF)
HYB25D512800CE-6 功能描述:IC DDR SDRAM 512MBIT 66TSOP RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:- 標(biāo)準(zhǔn)包裝:60 系列:- 格式 - 存儲器:EEPROMs - 串行 存儲器類型:EEPROM 存儲容量:16K (2K x 8) 速度:2MHz 接口:SPI 3 線串行 電源電壓:2.5 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:8-PDIP 包裝:管件 產(chǎn)品目錄頁面:1449 (CN2011-ZH PDF)
HYB25DC512160CE-5 制造商:Infineon Technologies AG 功能描述: 制造商:QIMONDA 功能描述:
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