參數(shù)資料
型號: HYB18L128160BF-7.5
廠商: INFINEON TECHNOLOGIES AG
英文描述: BJAWBMSpecialty DRAMs Mobile-RAM
中文描述: BJAWBMSpecialty DRAM的移動RAM
文件頁數(shù): 42/53頁
文件大?。?/td> 1328K
代理商: HYB18L128160BF-7.5
HY[B/E]18L128160B[C/F]-7.5
128-Mbit Mobile-RAM
Functional Description
Data Sheet
42
V1.4, 2004-04-30
2.4.10
POWER DOWN
Figure 45
Power Down Entry Command
Power-down is entered when CKE is registered LOW (no accesses can be in progress). If power-down occurs
when all banks are idle, this mode is referred to as precharge power-down; if power-down occurs when there is a
row active in any bank, this mode is referred to as active power-down. Entering power-down deactivates the input
and output buffers, excluding CLK and CKE. CKE LOW must be maintained during power-down.
Power-down duration is limited by the refresh requirements of the device (
t
REF
).
The power-down state is synchronously exited when CKE is registered HIGH (along with a NOP or DESELECT
command). One clock delay is required for power down entry and exit.
Table 13
Parameter
Timing Parameters for AUTO REFRESH and SELF REFRESH
Symbol
- 7.5
Units
Notes
min.
67
19
1
max.
64
ACTIVE to ACTIVE command period
PRECHARGE command period
Refresh period (
4096
rows)
Self refresh exit time
t
RC
t
RP
t
REF
t
SREX
ns
ns
ms
t
CK
1)
1) These parameters account for the number of clock cycles and depend on the operating frequency as follows:
no. of clock cycles = specified delay / clock period; round up to next integer.
1)
1)
1)
= Don't Care
CS
CKE
CLK
RAS
A0-A11
BA0,BA1
WE
CAS
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