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參數(shù)資料
| 型號： | HY64UD16322M-DF70E |
| 英文描述： | PSEUDO-STATIC RAM|2MX16|CMOS|BGA|48PIN|PLASTIC |
| 中文描述： | 偽靜態(tài)內(nèi)存| 2MX16 |的CMOS | BGA封裝| 48PIN |塑料 |
| 文件頁數(shù)： | 2/11頁 |
| 文件大?。?/td> | 350K |
| 代理商： | HY64UD16322M-DF70E |
HY64UD16162M Series
2
Revision 1.7
March. 2002
This document is a general product description and is subject to change without notice. Hynix Semiconductor Inc. does not
assume any responsibility for use of circuits described. No patent licenses are implied.
1
1
M x 16 bit Low
Low Power 1T/1C
SRAM
DESCRIPTION
The HY64UD16162M is a 16Mbit 1T/1C SRAM
featured by high-speed operation and super low
power consumption. The HY64UD16162M adopts
one transistor memory cell and is organized as
1,048,576 words by 16bits. The HY64UD16162M
operates in the extended range of temperature and
supports a wide operating voltage range. The
HY64UD16162M also supports the deep power
down mode for a super low standby current. The
HY64UD16162M delivers the high-density low
power SRAM capability to the high-speed low power
system.
PRODUCT FAMILY
CMOS Process Technology
1M x 16 bit Organization
TTL compatible and Tri-state outputs
Deep Power Down : Memory cell data hold invalid
Standard pin configuration : 48-FBGA
Data mask function by /LB, /UB
FEATURES
Note 1. tCS - /UB,/LB=High : Chip Deselect.
Product No.
Voltage
[V]
2.7~3.3
Speed
tRC[ns]
70
Temp.
[
°
C]
-25~85
(I
SB1
,Max) (I
DPD
,Max) (I
CC2
,Max)
85
μ
A
2
μ
A
Power Dissipation
Mode
HY64UD16162M-DF70I
HY64UD16162M-DF85E
2.7~3.3
2.7~3.3
70
85
-40~85
-25~85
85
μ
A
75
μ
A
2
μ
A
2
μ
A
25
mA
20
mA
1CS with /UB,/LB:tCS
1
1CS with /UB,/LB:tCS
1
HY64UD16162M-DF70E
25
mA
1CS with /UB,/LB:tCS
1
HY64UD16162M-DF85I
2.7~3.3
85
-40~85
75
μ
A
2
μ
A
20
mA
1CS with /UB,/LB:tCS
1
PIN DESCRIPTION
Pin Name
/CS1
CS2
Pin Function
Pin Name
/OE
Pin Function
Chip Select
Deep Power Down
IO1~IO8
IO9~IO16
Lower Data Inputs/Outputs
Upper Data Inputs/Outputs
/WE
/LB
/UB
DNU
NC
Write Enable
Lower Byte(IO1~IO8)
Upper Byte(IO9~IO16)
Do Not Use
No Connection
A0~A19
Vdd
Vss
Address Inputs
Power(2.7V~3.3V)
Ground
Output Enable
PIN CONNECTION
(Top View)
BLOCK DIAGRAM
A
B
P
C
D
B
D
ROW
DECODER
S
W
D
B
MEMORY ARRAY
1,024K x 16
CONTROL
LOGIC
A0
A19
IO1
IO8
IO9
IO16
/CS1
CS2
/LB
/UB
/OE
/LB
/OE
A0
A1
A2
CS2
IO9
/UB
A3
A4
/CS1
IO1
IO10 IO11
A5
A6
IO2
IO3
Vss
IO12
A17
A7
IO4
Vdd
Vdd
IO13 DNU
A16
IO5
Vss
IO15 IO14
A14
A15
IO6
IO7
IO16
A19
A12
A13
/WE
IO8
A18
A8
A9
A10
A11
NC
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HY64UD16322M-DF70I | PSEUDO-STATIC RAM|2MX16|CMOS|BGA|48PIN|PLASTIC |
| HY64UD16322M-DF85E | PSEUDO-STATIC RAM|2MX16|CMOS|BGA|48PIN|PLASTIC |
| HY64UD16322M-DF85I | PSEUDO-STATIC RAM|2MX16|CMOS|BGA|48PIN|PLASTIC |
| HYB-1 | Wideband Impedance Transforming 180 3dB Hybrid 1-300 MHz |
| HYB18RL25616AC-3.3 | ?256M (16Mx16) 300MHz ? |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HY64UD16322M-DF70I | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:2M x 16 bit Low Low Power 1T/1C Pseudo SRAM |
| HY64UD16322M-DF85E | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PSEUDO-STATIC RAM|2MX16|CMOS|BGA|48PIN|PLASTIC |
| HY64UD16322M-DF85I | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:2M x 16 bit Low Low Power 1T/1C Pseudo SRAM |
| HY64UD16322M-E | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:2M x 16 bit Low Low Power 1T/1C Pseudo SRAM |
| HY64UD16322M-I | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:2M x 16 bit Low Low Power 1T/1C Pseudo SRAM |
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