參數(shù)資料
型號(hào): HY64UD16322A-DF70I
廠商: Hynix Semiconductor Inc.
元件分類: DRAM
英文描述: 2M x 16 bit Low Low Power 1T/1C Pseudo SRAM
中文描述: 200萬(wàn)× 16位低功耗1T/1C偽靜態(tài)存儲(chǔ)器
文件頁(yè)數(shù): 9/11頁(yè)
文件大?。?/td> 269K
代理商: HY64UD16322A-DF70I
HY64UD16322A Series
9
Revision 1.1
May. 2003
AVOID TIMING
/WE
/CS1
ADD
< tRC
10us
ABNORMAL TIMING
/WE
/CS1
ADD
tRC
10us
AVOIDABLE TIMING(1)
Hynix 1T/1C SRAM has a timing which is not supported at read operation. If your system has multiple
invalid address signal shorter than tRC during over 10us at read operation which showed in abnormal
timing, Hynix 1T/1C SRAM needs a normal read timing at least during 10us which showed in avoidable
timing(1) or toggle the /CS1 to high(
tRC) one time at least which showed in avoidable timing(2)
/WE
/CS1
ADD
10us
tRC
AVOIDABLE TIMING(2)
< tRC
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