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參數(shù)資料
| 型號(hào)： | HY64UD16162M |
| 英文描述： | x16|3.0(VDD)3.0(VDDQ)V|70/85|Pseudo SRAM - 16M |
| 中文描述： | x16 | 3.0（VDD）在3.0（提供VDDQ）V | 70/85 |偽靜態(tài)存儲(chǔ)器- 1,600 |
| 文件頁(yè)數(shù)： | 9/11頁(yè) |
| 文件大小： | 350K |
| 代理商： | HY64UD16162M |
HY64UD16162M Series
9
Revision 1.7
March. 2002
AVOID TIMING
/WE
/CS1
ADD
< tRC
≥
10us
ABNORMAL TIMING
/WE
/CS1
ADD
≥
tRC
≥
10us
AVOIDABLE TIMING(1)
Hynix 1T/1C SRAM has a timing which is not supported at read operation. If your system has multiple
invalid address signal shorter than tRC during over 10us at read operation which showed in abnormal
timing, Hynix 1T/1C SRAM needs a normal read timing at least during 10us which showed in avoidable
timing(1) or toggle the /CS1 to high(
≥
tRC) one time at least which showed in avoidable timing(2)
/WE
/CS1
ADD
≥
10us
≥
tRC
AVOIDABLE TIMING(2)
< tRC
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HY64UD16162M-DF70C | PSEUDO-STATIC RAM|1MX16|CMOS|BGA|48PIN|PLASTIC |
| HY64UD16162M-DF70E | PSEUDO-STATIC RAM|1MX16|CMOS|BGA|48PIN|PLASTIC |
| HY64UD16162M-DF85C | PSEUDO-STATIC RAM|1MX16|CMOS|BGA|48PIN|PLASTIC |
| HY64UD16162M-DF85E | PSEUDO-STATIC RAM|1MX16|CMOS|BGA|48PIN|PLASTIC |
| HY64UD16322M | x16|3.0(VDD)3.0(VDDQ)V|70/85|Pseudo SRAM - 32M |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HY64UD16162M-DF70C | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PSEUDO-STATIC RAM|1MX16|CMOS|BGA|48PIN|PLASTIC |
| HY64UD16162M-DF70E | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:1M x 16 bit Low Low Power 1T/1C Pseudo SRAM |
| HY64UD16162M-DF70I | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:1M x 16 bit Low Low Power 1T/1C Pseudo SRAM |
| HY64UD16162M-DF85C | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PSEUDO-STATIC RAM|1MX16|CMOS|BGA|48PIN|PLASTIC |
| HY64UD16162M-DF85E | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PSEUDO-STATIC RAM|1MX16|CMOS|BGA|48PIN|PLASTIC |
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