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參數(shù)資料
| 型號(hào)： | HY64UD16162M |
| 英文描述： | x16|3.0(VDD)3.0(VDDQ)V|70/85|Pseudo SRAM - 16M |
| 中文描述： | x16 | 3.0（VDD）在3.0（提供VDDQ）V | 70/85 |偽靜態(tài)存儲(chǔ)器- 1,600 |
| 文件頁(yè)數(shù)： | 8/11頁(yè) |
| 文件大?。?/td> | 350K |
| 代理商： | HY64UD16162M |
HY64UD16162M Series
8
Revision 1.7
March. 2002
Notes :
1. A write occurs during the overlap of low /CS1, low /WE and low /UB and/or /LB.
2. tWR is measured from the earlier of /CS1, /LB, /UB, or /WE going high to the end of write cycle.
3. During this period, I/O pins are in the output state so that the input signals of opposite phase to the output must not be applied.
4. If the /CS1, /LB and /UB low transition occur simultaneously with the /WE low transition or after the
/WE transition, outputs remain in a high impedance state.
5. /OE is continuously low (/OE=V
IL
)
6. Q(data out) is the invalid data.
7. Q(data out) is the read data of the next address.
8. tWHZ is defined as the time at which the outputs achieve the high impedance state.
It is not referenced to output voltage levels.
9. /CS1 in high for the standby, low for active. /UB and /LB in high for the standby, low for active.
10. Do not input data to the I/O pins while they are in the output state.
WRITE CYCLE 1 ( Note 1, 4, 5, 9, 10 ) ( /WE Controlled )
ADD
/CS1
CS2
/UB, /LB
/WE
Data Out
Data In
Vih
tWC
tCW
tBW
tWP
tWR
(2)
Data Valid
tAW
tAS
High-Z
tDW
tDH
tWHZ
(3,8)
tOW
(6)
(7)
WRITE CYCLE 2 ( Note 1, 4, 5, 9, 10 ) ( /CS1 Controlled )
ADD
/CS1
CS2
/UB, /LB
/WE
Data Out
Data In
Vih
tWC
tCW
tBW
tWP
tWR
(2)
Data Valid
tAW
High-Z
tDW
tDH
High-Z
tAS
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HY64UD16162M-DF70C | PSEUDO-STATIC RAM|1MX16|CMOS|BGA|48PIN|PLASTIC |
| HY64UD16162M-DF70E | PSEUDO-STATIC RAM|1MX16|CMOS|BGA|48PIN|PLASTIC |
| HY64UD16162M-DF85C | PSEUDO-STATIC RAM|1MX16|CMOS|BGA|48PIN|PLASTIC |
| HY64UD16162M-DF85E | PSEUDO-STATIC RAM|1MX16|CMOS|BGA|48PIN|PLASTIC |
| HY64UD16322M | x16|3.0(VDD)3.0(VDDQ)V|70/85|Pseudo SRAM - 32M |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HY64UD16162M-DF70C | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PSEUDO-STATIC RAM|1MX16|CMOS|BGA|48PIN|PLASTIC |
| HY64UD16162M-DF70E | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:1M x 16 bit Low Low Power 1T/1C Pseudo SRAM |
| HY64UD16162M-DF70I | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:1M x 16 bit Low Low Power 1T/1C Pseudo SRAM |
| HY64UD16162M-DF85C | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PSEUDO-STATIC RAM|1MX16|CMOS|BGA|48PIN|PLASTIC |
| HY64UD16162M-DF85E | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PSEUDO-STATIC RAM|1MX16|CMOS|BGA|48PIN|PLASTIC |
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