參數(shù)資料
型號(hào): HY62UF16804B
廠商: Hynix Semiconductor Inc.
英文描述: 512Kx16bit full CMOS SRAM
中文描述: 512Kx16bit充分的CMOS的SRAM
文件頁(yè)數(shù): 2/10頁(yè)
文件大?。?/td> 197K
代理商: HY62UF16804B
HY62UF16804B
Preliminary
DESCRIPTION
The HY62UF16804B is a high speed, super low
power and 8Mbit full CMOS SRAM organized as
512K words by 16bits. The HY62UF16804B uses
high performance full CMOS process technology
and is designed for high speed and low power
circuit technology. It is particularly well-suited for
the high density low power system application.
This device has a data retention mode that
guarantees data to remain valid at a minimum
power supply voltage of 1.2V.
Product
Voltage
Speed
Operation
No.
(V)
(ns)
Current/Icc(mA)
HY62UF16804B-C
2.7~3.3
55/70/85
3
HY62UF16804B-I
2.7~3.3
55/70/85
3
Note 1. C : Commercial, I : Industrial
2. Current value is max.
PIN CONNECTION
( Top View )
BLOCK DIAGRAM
PIN DESCRIPTION
Pin Name
Pin Function
Pin Name
/CS
Chip Select
I/O1~I/O16
/WE
Write Enable
A0~A18
/OE
Output Enable
Vcc
/LB
Lower Byte Control(I/O1~I/O8)
Vss
/UB
Upper Byte Control(I/O9~I/O16)
NC
Rev.01/Mar. 2002
2
FEATURES
Fully static operation and Tri-state output
TTL compatible inputs and outputs
Battery backup(LL/SL-part)
- 1.2V(min) data retention
Standard pin configuration
- 48-fBGA
Standby Current(uA)
LL
15
15
Temperature
(
°
C)
0~70
-40~85
Pin Function
Data Inputs / Outputs
Address Inputs
Power(2.7V~3.3V)
Ground
No Connection
/
LB
IO9
IO10
Vss IO12
A17
A7
IO4
Vcc
Vcc IO13
Vss A16
IO5
Vss
IO15
IO14
A14
A15
IO6
IO7
IO16
NC
A12
A13
/
WE
IO8
A18
A8
A9
A10
A11
NC
/
OE
A0
A1
A2
NC
/
UB
A3
A4
/
CS
IO1
IO11
A5
A6
IO2
IO3
1
2
3
4
5
6
A
B
C
D
E
F
G
H
MEMORY ARRAY
256K x 16
ROW
DECODER
S
W
D
B
I/O1
I/O8
I/O9
I/O16
C
D
B
D
P
A
B
A0
A18
/CS
/OE
/LB
/UB
/WE
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