參數(shù)資料
型號(hào): HY62UF16804B-DFC
廠商: Hynix Semiconductor Inc.
英文描述: 512Kx16bit full CMOS SRAM
中文描述: 512Kx16bit充分的CMOS的SRAM
文件頁(yè)數(shù): 5/10頁(yè)
文件大小: 197K
代理商: HY62UF16804B-DFC
HY62UF16804B
AC CHARACTERISTICS
Vcc = 2.7V~3.3V, T
A
= 0
°
C to 70
°
C/ -40
°
C to 85
°
C unless otherwise specified
Rev.01/Mar. 2002
4
-55
-70
-85
#
Symbol
Parameter
Min.
Max.
Min.
Max.
Min
Max.
READ CYCLE
1
tRC
2
tAA
3
tACS
4
tOE
5
tBA
6
tCLZ
7
tOLZ
8
tBLZ
9
tCHZ
10
tOHZ
11
tBHZ
12
tOH
WRITE CYCLE
13
tWC
14
tCW
15
tAW
16
tBW
17
tAS
18
tWP
19
tWR
20
tWHZ
21
tDW
22
tDH
23
tOW
AC TEST CONDITIONS
T
A
= 0
°
C to 70
°
C / -40
°
C to 85
°
C, unless otherwise specified
PARAMETER
Input Pulse Level
Input Rise and Fall Time
Input and Output Timing Reference Level
tCLZ,tOLZ,tBLZ,tCHZ,tOHZ,tBHZ,tWHZ,tOW
Output Load
Other
AC TEST LOADS
Read Cycle Time
Address Access Time
Chip Select Access Time
Output Enable to Output Valid
/LB, /UB Access Time
Chip Select to Output in Low Z
Output Enable to Output in Low Z
/LB, /UB Enable to Output in Low Z
Chip Deselection to Output in High Z
Out Disable to Output in High Z
/LB, /UB Disable to Output in High Z
Output Hold from Address Change
55
-
-
-
-
10
5
10
0
0
0
10
-
70
-
-
-
-
10
5
10
0
0
0
10
-
85
-
-
-
-
10
5
10
0
0
0
10
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
55
55
30
55
-
-
-
30
30
30
-
70
70
35
70
-
-
-
30
30
30
-
85
85
40
85
-
-
-
30
30
30
-
Write Cycle Time
Chip Selection to End of Write
Address Valid to End of Write
/LB, /UB Valid to End of Write
Address Set-up Time
Write Pulse Width
Write Recovery Time
Write to Output in High Z
Data to Write Time Overlap
Data Hold from Write Time
Output Active from End of Write
55
50
50
50
0
45
0
0
25
0
5
-
-
-
-
-
-
-
70
60
60
60
0
50
0
0
30
0
5
-
-
-
-
-
-
-
85
70
70
70
0
60
0
0
35
0
5
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
20
-
-
-
20
-
-
-
25
-
-
-
Value
0.4V to 2.2V
5ns
1.5V
CL = 5pF + 1TTL Load
CL = 30pF + 1TTL Load
Note
1. Including jig and scope capacitance
D
OUT
1728 Ohm
CL(1)
1029 Ohm
V
TM
= 2.8V
Unit
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