參數(shù)資料
型號(hào): HY62CT08081E-I
廠商: Hynix Semiconductor Inc.
英文描述: 32Kx8bit CMOS SRAM
中文描述: 32Kx8bit CMOS SRAM的
文件頁(yè)數(shù): 7/12頁(yè)
文件大?。?/td> 186K
代理商: HY62CT08081E-I
HY62CT08081E Series
TIMING DIAGRAM
READ CYCLE 1
Rev 04 / Apr. 2001
6
ADDR
OE
CS
Data
Out
Note(READ CYCLE):
1. t
CHZ
and t
OHZ
are defined as the time at which the outputs achieve the open circuit conditions and arenot
referenced to output voltage levels.
2. At any given temperature and voltage condition, t
CHZ
max. is less than t
CLZ
min. both for a given device
and from device to device.
3. /WE is high for the read cycle.
READ CYCLE 2
tRC
Data Valid
tRC
tACS
tCLZ
tOE
tOLZ
tAA
tOH
tOHZ
tCHZ
High-Z
tAA
Data Valid
Previous Data
tOH
tOH
ADDR
Data
Out
Note(READ CYCLE):
1. /WE is high for the read cycle.
2. Device is continuously selected /CS= V
IL.
3. /OE =V
IL
.
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