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參數(shù)資料
| 型號(hào)： | HY5V62CF-7 |
| 英文描述： | x32 SDRAM |
| 中文描述： | X32號(hào)，內(nèi)存 |
| 文件頁數(shù)： | 6/11頁 |
| 文件大?。?/td> | 201K |
| 代理商： | HY5V62CF-7 |
Rev. 0.4/Nov. 01
7
HY5V62CF
DC CHARACTERISTICS II
(DC operating conditions unless otherwise noted)
Note :
1.I
DD1
and I
DD4
depend on output loading and cycle rates. Specified values are measured with the output open
2.Min. of tRRC (Refresh RAS cycle time) is shown at AC CHARACTERISTICS I
Parameter
Symbol
Test Condition
Speed
Unit
Note
-7
-S
Operating Current
IDD1
Burst Length=1, One bank active
tRAS
≥
tRAS(min), tRP
≥
tRP(min),
IOL=0mA
120
115
mA
1
Precharge Standby Current
in power down mode
IDD2P
CKE
≤
VIL(max), tCK = 15ns
2
mA
IDD2PS
CKE
≤
VIL(max), tCK =
∞
2
Precharge Standby Current
in non power down mode
IDD2N
CKE
≥
VIH(min), CS
≥
VIH(min), tCK = 15ns
Input signals are changed one time during
2clks. All other pins
≥
VDD-0.2V or
≤
0.2V
15
mA
IDD2NS
CKE
≥
VIH(min), tCK =
∞
Input signals are stable.
10
Active Standby Current
in power down mode
IDD3P
CKE
≤
VIL(max), tCK = 15ns
3
mA
IDD3PS
CKE
≤
VIL(max), tCK =
∞
3
Active Standby Current
in non power down mode
IDD3N
CKE
≥
VIH(min), CS
≥
VIH(min), tCK = 15ns
Input signals are changed one time during
2clks. All other pins
≥
VDD-0.2V or
≤
0.2V
40
mA
IDD3NS
CKE
≥
VIH(min), tCK =
∞
Input signals are stable
25
Burst Mode Operating
Current
IDD4
tCK
≥
tCK(min),
tRAS
≥
tRAS(min), IOL=0mA
All banks active
CL=3
210
180
mA
1
CL=2
-
160
Auto Refresh Current
IDD5
tRRC
≥
tRRC(min), 2 banks active
210
190
mA
2
Self Refresh Current
IDD6
CKE
≤
0.2V
2
mA
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| HY5V62CF-S | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x32 SDRAM |
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| HY5V66EF6-5 | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:64Mb Synchronous DRAM based on 1M x 4Bank x16 I/O |
| HY5V66EF6-6 | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:64Mb Synchronous DRAM based on 1M x 4Bank x16 I/O |
| HY5V66EF6-7 | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:64Mb Synchronous DRAM based on 1M x 4Bank x16 I/O |
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