參數(shù)資料
型號(hào)： HY5S6B6DLFP-SE
廠商： HYNIX SEMICONDUCTOR INC
元件分類： DRAM
英文描述： 4Banks x1M x 16bits Synchronous DRAM
中文描述： 4M X 16 SYNCHRONOUS DRAM, 7 ns, PBGA54
封裝： 0.80 MM PITCH, LEAD FREE, FBGA-54
文件頁(yè)數(shù)： 16/27頁(yè)
文件大?。?/td> 368K
代理商： HY5S6B6DLFP-SE
Rev 0.3 / July 2004
16
HY5S6B6D(L/S)F(P)-xE
4Banks x 1M x 16bits Synchronous DRAM
Note :
1. H: Logic High, L: Logic Low, X: Don
'
t care, BA: Bank Address, AP: Auto Precharge.
2. All entries assume that CKE was active during the preceding clock cycle.
3. If both banks are idle and CKE is inactive, then in power down cycle
4. Illegal to bank in specified states. Function may be legal in the bank indicated by Bank Address,
depending on the state of that bank.
5. If both banks are idle and CKE is inactive, then Self Refresh mode.
6. Illegal if t
RCD
is not satisfied.
7. Illegal if t
RAS
is not satisfied.
8. Must satisfy burst interrupt condition.
9. Must satisfy bus contention, bus turn around, and/or write recovery requirements.
10. Must mask preceding data which don
'
t satisfy t
DPL
.
11. Illegal if t
RRD
is not satisfied
12. Illegal for single bank, but legal for other banks in multi-bank devices.
13. Illegal for all banks.
14. Mode Register Set and Extended Mode Register Set is same command truth table except BA1.
相關(guān)PDF資料
PDF描述
HY5S6B6DLF-SE 4Banks x1M x 16bits Synchronous DRAM
HY5S6B6DSF-BE 4Banks x1M x 16bits Synchronous DRAM
HY5S6B6DSFP-BE 4Banks x1M x 16bits Synchronous DRAM
HY5S6B6DSFP-SE 4Banks x1M x 16bits Synchronous DRAM
HY5S6B6DSF-SE 4Banks x1M x 16bits Synchronous DRAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HY5S6B6DLF-SE 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:4Banks x1M x 16bits Synchronous DRAM
HY5S6B6DSF-BE 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:4Banks x1M x 16bits Synchronous DRAM
HY5S6B6DSFP-BE 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:4Banks x1M x 16bits Synchronous DRAM
HY5S6B6DSFP-SE 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:4Banks x1M x 16bits Synchronous DRAM
HY5S6B6DSF-SE 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:4Banks x1M x 16bits Synchronous DRAM
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