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參數(shù)資料
| 型號： | HY57V64820HG |
| 廠商： | Hynix Semiconductor Inc. |
| 英文描述： | 4 Banks x 2M x 8Bit Synchronous DRAM |
| 中文描述： | 4銀行x 2米× 8位同步DRAM |
| 文件頁數(shù)： | 8/11頁 |
| 文件大小： | 134K |
| 代理商： | HY57V64820HG |
HY57V64820HG
Rev. 0.5/Sep. 02
8
AC CHARACTERISTICS II
Note :
1. A new command can be given tRRC after self refresh exit
Parameter
Symbol
-6
-7
-K
-H
-8
-P
-S
Unit
Note
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
RAS Cycle Time
Operation
t
RC
60
-
62
-
65
-
65
-
68
-
70
-
70
-
ns
Auto
Refresh
t
RRC
60
-
62
-
65
-
65
-
68
-
70
-
70
-
ns
RAS to CAS Delay
t
RCD
18
-
20
-
15
-
20
-
20
-
20
-
20
-
ns
RAS Active Time
t
RAS
42
100K
42
120K
45
120K
45
120K
48
120K
50
120K
50
120K
ns
RAS Precharge Time
t
RP
18
-
20
-
15
-
20
-
20
-
20
-
20
-
ns
RAS to RAS Bank Active Delay
t
RRD
12
-
14
-
15
-
15
-
16
-
20
-
20
-
ns
CAS to CAS Delay
t
CCD
1
-
1
-
1
-
1
-
1
-
1
-
1
-
CLK
Write Command to Data-In
Delay
t
WTL
0
-
0
-
0
-
0
-
0
-
0
-
0
-
CLK
Data-In to Precharge
Command
t
DPL
2
-
1
-
1
-
1
-
1
-
1
-
1
-
CLK
Data-In to Active Command
t
DAL
5
-
4
-
4
-
4
-
4
-
3
-
3
-
CLK
DQM to Data-Out Hi-Z
t
DQZ
2
-
2
-
2
-
2
-
2
-
2
-
2
-
CLK
DQM to Data-In Mask
t
DQM
0
-
0
-
0
-
0
-
0
-
0
-
0
-
CLK
MRS to New Command
t
MRD
2
-
1
-
1
-
1
-
1
-
1
-
1
-
CLK
Precharge to
Data Output Hi-Z
CAS
Latency = 3
t
PROZ3
3
-
3
-
3
-
3
-
3
-
3
-
3
-
CLK
CAS
Latency = 2
t
PROZ2
2
-
2
-
2
-
2
-
2
-
2
-
2
-
CLK
Power Down Exit Time
t
PDE
1
-
1
-
1
-
1
-
1
-
1
-
1
-
CLK
Self Refresh Exit Time
t
SRE
1
-
1
-
1
-
1
-
1
-
1
-
1
-
CLK
1
Refresh Time
t
REF
-
64
-
64
-
64
-
64
-
64
-
64
-
64
ms
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HY57V64820HGLT-5 | 4 Banks x 2M x 8Bit Synchronous DRAM |
| HY57V64820HGLT-55 | 4 Banks x 2M x 8Bit Synchronous DRAM |
| HY57V64820HGTP-5 | 4 Banks x 2M x 8Bit Synchronous DRAM |
| HY57V64820HGTP-55 | Aluminum Electrolytic Radial Leaded General Purpose Capacitor; Capacitance: 220uF; Voltage: 25V; Case Size: 8x11.5 mm; Packaging: Bulk |
| HY57V64820HGTP-6 | 4 Banks x 2M x 8Bit Synchronous DRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HY57V64820HGLT | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8Mx8|3.3V|4K|6|SDR SDRAM - 64M |
| HY57V64820HGLT-5 | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:4 Banks x 2M x 8Bit Synchronous DRAM |
| HY57V64820HGLT-55 | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:4 Banks x 2M x 8Bit Synchronous DRAM |
| HY57V64820HGLT-6 | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:4 Banks x 2M x 8Bit Synchronous DRAM |
| HY57V64820HGLT-7 | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:4 Banks x 2M x 8Bit Synchronous DRAM |
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