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參數(shù)資料
| 型號： | HY57V161610ET-6 |
| 廠商： | HYNIX SEMICONDUCTOR INC |
| 元件分類： | DRAM |
| 英文描述： | 2 Banks x 512K x 16 Bit Synchronous DRAM |
| 中文描述： | 1M X 16 SYNCHRONOUS DRAM, 5.5 ns, PDSO50 |
| 封裝： | 0.400 X 0.825 INCH, 0.80 MM PITCH, TSOP2-50 |
| 文件頁數(shù)： | 10/13頁 |
| 文件大?。?/td> | 181K |
| 代理商： | HY57V161610ET-6 |
HY57V161610E
Rev. 0.2 / Aug. 2003
10
AC CHARACTERISTICS
(TA=0
°
C
to 70
°
C
, V
DD
=3.0V to
3.6V, V
SS
=0V
Note1,2
)
- continued
-
Note :
1. V
DD
(min) is 3.15V when HY57V161610ET-7 operates at CAS latency=2 and tCK2=8.9ns.
2.V
DD
(min) of HY57V161610ET-5/55 is 3.15V
3. A new command can be given tRRC after self refresh exit.
DEVICE OPERATING OPTION TABLE
HY57V161610ET-5
Paramter
Symbol
-8
-10
-15
Unit
Note
Min
Max
Min
Max
Min
Max
RAS cycle time
Operation
tRC
70
-
70
-
70
-
ns
Auto Refresh
tRRC
70
-
80
-
80
-
ns
RAS to CAS delay
tRCD
20
-
20
-
20
-
ns
RAS active time
tRAS
45
100K
45
100K
45
100K
ns
RAS precharge time
tRP
3
-
2
-
2
-
CLK
RAS to RAS bank active delay
tRRD
2
-
2
-
2
-
CLK
CAS to CAS bank active delay
tCCD
1
-
1
-
1
-
CLK
Write command to data-in delay
tWTL
0
-
0
-
0
-
CLK
Data-in to precharge command
tDPL
1
-
1
-
1
-
CLK
Data-in to active command
tDAL
4
-
3
-
3
-
CLK
DQM to data-in Hi-Z
tDQZ
2
-
2
-
2
-
CLK
DQM to data mask
tDQM
0
-
0
-
0
-
CLK
MRS to new command
tMRD
2
-
2
-
2
-
CLK
Precharge to data output Hi-Z
tPROZ
3
-
3
-
3
-
CLK
Power down exit time
tPDE
1
-
1
-
1
-
CLK
Self refresh exit time
tSRE
1
-
1
-
1
-
CLK
3
Refresh Time
tREF
-
64
-
64
-
64
ms
CAS Latency
tRCD
tRAS
tRC
tRP
tAC
tOH
200MHz
3CLKs
3CLKs
8CLKs
11CLKs
3CLKs
4.5ns
1.5ns
183MHz
3CLKs
3CLKs
7CLKs
10CLKs
3CLKs
5ns
2ns
166MHz
3CLKs
3CLKs
7CLKs
10CLKs
3CLKs
5.5ns
2ns
相關PDF資料 |
PDF描述 |
|---|---|
| HY57V161610ET-7 | 2 Banks x 512K x 16 Bit Synchronous DRAM |
| HY57V161610ET-8 | 2 Banks x 512K x 16 Bit Synchronous DRAM |
| HY57V161610ET-10 | 2 Banks x 512K x 16 Bit Synchronous DRAM |
| HY57V161610ET-15 | 2 Banks x 512K x 16 Bit Synchronous DRAM |
| HY57V161610ET-5 | 2 Banks x 512K x 16 Bit Synchronous DRAM |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| HY57V161610ET-6I | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:2 Banks x 512K x 16 Bit Synchronous DRAM |
| HY57V161610ET-7 | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:2 Banks x 512K x 16 Bit Synchronous DRAM |
| HY57V161610ET-7I | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:2 Banks x 512K x 16 Bit Synchronous DRAM |
| HY57V161610ET-8 | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:2 Banks x 512K x 16 Bit Synchronous DRAM |
| HY57V161610ET-8I | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:2 Banks x 512K x 16 Bit Synchronous DRAM |
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