參數(shù)資料
型號: HY57V161610ET-10
廠商: HYNIX SEMICONDUCTOR INC
元件分類: DRAM
英文描述: 2 Banks x 512K x 16 Bit Synchronous DRAM
中文描述: 1M X 16 SYNCHRONOUS DRAM, 7 ns, PDSO50
封裝: 0.400 X 0.825 INCH, 0.80 MM PITCH, TSOP2-50
文件頁數(shù): 7/13頁
文件大小: 181K
代理商: HY57V161610ET-10
HY57V161610E
Rev. 0.2 / Aug. 2003
7
AC CHARACTERISTICS
(TA=0
°
C
to 70
°
C
, V
DD
=3.0V to
3.6V, V
SS
=0V
Note1,2
)
Parameter
Symbol
-5
-55
-6
-7
Unit
Note
Min
Max
Min
Max
Min
Max
Min
Max
System clock
cycle time
CL=3
tCK3
5
5.5
6
-
7
-
ns
CL=2
tCK2
-
-
10
-
10
-
3
CL=1
tCK1
-
-
-
-
-
-
Clock high pulse width
tCHW
2
2
2
-
2.5
-
ns
4
Clock low pulse width
tCLW
2
2
2
-
2.5
-
ns
4
Access time
from clock
CL=3
tAC3
4.5
5
-
5.5
-
6
ns
CL=2
tAC2
-
6
-
6
3
CL=1
tAC1
-
-
-
-
Data-out hold time
tOH
1.5
2
2
-
2.5
-
ns
Data-Input setup time
tDS
1.5
1.5
1.5
-
1.75
-
ns
4
Data-Input hold time
tDH
1
1
1
-
1
-
ns
4
Address setup time
tAS
1.5
1.5
1.5
-
1.75
-
ns
4
Address hold time
tAH
1
1
1
-
1
-
ns
4
CKE setup time
tCKS
1.5
1.5
1.5
-
1.75
-
ns
4
CKE hold time
tCKH
1
1
1
-
1
-
ns
4
Command setup time
tCS
1.5
1.5
1.5
-
1.75
-
ns
4
Command hold time
tCH
1
1
1
-
1
-
ns
4
CLK to data output in low Z-
time
tOLZ
2
2
2
-
2
-
ns
CLK to data output in high
Z-time
tOHZ
2
5
2
5.5
2
6
2
7
ns
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