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參數(shù)資料
| 型號： | HY51V64400JC60 |
| 英文描述： | x4 Fast Page Mode DRAM |
| 中文描述： | x4快速頁面模式的DRAM |
| 文件頁數(shù)： | 4/11頁 |
| 文件大?。?/td> | 94K |
| 代理商： | HY51V64400JC60 |
HY51V(S)16400HG/HGL
Rev.0.1/Apr.01
4
DC CHARACTERISTICS
(Vcc = 3.3V +/- 10%, TA=0 to 70
°
C
)
Note :
1. Icc depends on output load condition when the device is selected, Icc(max) is specified at the output open condition
2. Address can be changed once or less while /RAS=VIL
3. Address can be changed once or less while /CAS=VIH
4. L-Version
Symbol
Parameter
Min
Max
Unit
Note
VOH
Output Level
Output Level voltage(Iout= -2mA)
2.4
Vcc
V
VOL
Output Level
Output Level voltage(Iout=2mA)
0
0.4
V
ICC1
Operating current
Average power supply operating current
( /RAS, /CAS Cycling : tRC = tRC min)
50ns
-
90
mA
1, 2
60ns
-
80
70ns
-
70
I
CC2
Standby current (TTL interface)
Power supply standby current
(/RAS, /CAS=VIH, Dout = High-Z)
-
2
mA
ICC3
/RAS only refresh current
Average power supply current
/RAS only refresh mode
(tRC= tRC min)
50ns
-
90
mA
2
60ns
-
80
70ns
-
70
ICC4
Fast page mode current
Average power supply current
Fast page mode (tPC=tPC min)
50ns
-
80
mA
1, 3
60ns
-
70
70ns
-
60
ICC5
CMOS interface ( /RAS, /CAS >= Vcc-0.2V, Dout = High-Z)
-
1
mA
Standby current ( L-version)
-
100
uA
4
ICC6
/CAS-before-/RAS refresh current (tRC=tRC min)
50ns
-
90
mA
60ns
-
80
70ns
-
70
ICC7
Battery back up operating current (standby with CBR refresh)
(CBR refresh, tRC=31.3us, tRAS<=0.3us, Dout=High-Z, CMOS interface)
-
300
uA
4
ICC8
Standby current
( /RAS = VIH, /CAS = VIL, Dout=Enable)
-
5
uA
1
ICC9
Self refresh current
(/RAS, /CAS <=0.2V, Dout=High-Z, CMOS interface)
-
200
uA
4
II(L)
Input leakage current, Any input (0V<= Vin<=4.6)
-10
10
uA
IO(L)
Output leakage current, (Dout is disabled, 0V<= Vout<=4.6)
-10
10
uA
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