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參數(shù)資料
| 型號(hào)： | HWD2108 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Dual 105 mW Headphone Amplifier |
| 中文描述： | 雙105毫瓦耳機(jī)放大器 |
| 文件頁(yè)數(shù)： | 14/18頁(yè) |
| 文件大?。?/td> | 944K |
| 代理商： | HWD2108 |
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Application Information
(Continued)
Also, careful consideration must be taken in selecting a
certain type of capacitor to be used in the system. Different
types of capacitors (tantalum, electrolytic, ceramic) have
unique performance characteristics and may affect overall
system performance.
Bypass Capacitor Value
Besides minimizing the input capacitor size, careful consid-
eration should be paid to the value of the bypass capacitor,
C
. Since C
determines how fast the
HWD
21
08 settles to
quiescent operation, its value is critical when minimizing
turn-on pops. The slower the
HWD21
08’s outputs ramp to their
quiescent DC voltage (nominally 1/2 V
), the smaller the
turn-on pop. Choosing C
equal to 1.0μF or larger, will
minimize turn-on pops. As discussed above, choosing C
no
larger than necessary for the desired bandwith helps mini-
mize clicks and pops.
AUDIO POWER AMPLIFIER DESIGN
Design a Dual 70mW/32
Audio Amplifier
Given:
Power Output
Load Impedance
Input Level
Input Impedance
Bandwidth
70mW
32
1Vrms (max)
20k
100Hz–20kHz
±
0.50dB
The design begins by specifying the minimum supply voltage
necessary to obtain the specified output power. One way to
find the minimum supply voltage is to use the Output Power
vs Supply Voltage curve in the
Typical Performance Char-
acteristics
section. Another way, using Equation (5), is to
calculate the peak output voltage necessary to achieve the
desired output power for a given load impedance. To ac-
count for the amplifier’s dropout voltage, two additional volt-
ages, based on the Dropout Voltage vs Supply Voltage in the
Typical Performance Characteristics
curves, must be
added to the result obtained by Equation (5). For a
single-ended application, the result is Equation (6).
(5)
V
DD
≥
(2V
OPEAK
+ (V
OD
TOP
+ V
OD
BOT
))
(6)
The Output Power vs Supply Voltage graph for a 32
load
indicates a minimum supply voltage of 4.8V. This is easily
met by the commonly used 5V supply voltage. The additional
voltage creates the benefit of headroom, allowing the
HWD21
08 to produce peak output power in excess of 70mW
without clipping or other audible distortion. The choice of
supply voltage must also not create a situation that violates
maximum power dissipation as explained above in the
Power Dissipation
section. Remember that the maximum
power dissipation point from Equation (1) must be multiplied
by two since there are two independent amplifiers inside the
package. Once the power dissipation equations have been
addressed, the required gain can be determined from Equa-
tion (7).
(7)
Thus, a minimum gain of 1.497 allows the
HWD21
08 to reach
full output swing and maintain low noise and THD+N perfro-
mance. For this example, let A
V
=1.5.
The amplifiers overall gain is set using the input (R
) and
feedback (R
) resistors. With the desired input impedance
set at 20k
, the feedback resistor is found using Equation
(8).
A
V
= R
f
/R
i
(8)
The value of R
f
is 30k
.
The last step in this design is setting the amplifier’s 3db
frequency bandwidth. To achieve the desired
±
0.25dB pass
band magnitude variation limit, the low frequency response
must extend to at lease onefifth the lower bandwidth limit
and the high frequency response must extend to at least five
times the upper bandwidth limit. The gain variation for both
response limits is 0.17dB, well within the
±
0.25dB desired
limit. The results are an
f
L
= 100Hz/5 = 20Hz
(9)
and a
f
H
= 20kHz
*
5 = 100kHz
(10)
As stated in the
External Components
section, both R
in
conjunction with C
, and C
with R
, create first order high-
pass filters. Thus to obtain the desired low frequency re-
sponse of 100Hz within
±
0.5dB, both poles must be taken
into consideration. The combination of two single order filters
at the same frequency forms a second order response. This
results in a signal which is down 0.34dB at five times away
from the single order filter 3dB point. Thus, a frequency of
20Hz is used in the following equations to ensure that the
response is better than 0.5dB down at 100Hz.
C
i
≥
1 / (2
π
* 20 k
* 20 Hz) = 0.397μF; use 0.39μF.
C
o
≥
1 / (2
π
* 32
* 20 Hz) = 249μF; use 330μF.
The high frequency pole is determined by the product of the
desired high frequency pole, f
H
, and the closed-loop gain,
A
V
. With a closed-loop gain of 1.5 and f
H
= 100kHz, the
resulting GBWP = 150kHz which is much smaller than the
HWD21
08’s GBWP of 900kHz. This figure displays that if a
designer has a need to design an amplifier with a higher
gain, the
HWD21
08 can still be used without running into
bandwidth limitations.
14
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