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參數(shù)資料
| 型號： | HV310 |
| 廠商： | Supertex, Inc. |
| 元件分類： | 脈沖抑制器 |
| 英文描述： | Hotswap, Inrush Current Limiter Controllers |
| 中文描述： | 熱插拔，浪涌電流限制器控制器 |
| 文件頁數(shù)： | 3/6頁 |
| 文件大?。?/td> | 78K |
| 代理商： | HV310 |
3
HV300/HV310
Timing Diagrams
Absolute Maximum Ratings
V
EE
reference to V
DD
pin
+0.3V to -100V
V
PWRGD
referenced to V
EE
Voltage
-0.3V to +100V
Operating Ambient Temperature Range
-40
°
C to +85
°
C
Operating Junction Temperature
Range
-40
°
C to +125
°
C
Storage Temperature Range
-65
°
C to +150
°
C
UV & OV ref to V
EE
-0.3V to +12V
V
INT
is the internally regulated supply voltage and can
range from 9V to 11V.
V
GS(th)
is the gate threshold voltage of the external pass
transistor and may be obtained from its datasheet.
V
GS(lim)
is the pass transistor gate-source voltage required
to obtain the limit curent. It is dependent on the pass
transistor’s characteristics and may be obtained from the
transfer characteristics curves on the transistor datasheet.
g
fs
is the transconductance of the pass transistor and may
be obtained from its datasheet.
R
FB
is the internal feedback resistor and is 5k
nominal.
I
V
R
t
VC
I
t
V
C
I
t
t
t
t
C
g
I
.
I
R
R
t
V
C
I
t
t
V
V
V
C
I
LIM
SENSE
SENSE
START
RAMP
RAMP
TH
GS th
RAMP
RAMP
POR
START
TH
RISE
RAMP
fs
RAMP
0 9
LIM
SENSE
FB
LIM
IN
LOAD
LIM
RISE
PWRGD
INT
GS
RAMP
RAMP
=
=
=
=
+
≈
≈
=
(
)
1 2
.
1
2
1 2
.
(
lim)
GND
-48V
V
IN
V
OUT
I
IN
t
START
contact
bounce
I
LIM
PWRGD
V
UVL
t
RISE
t
PWRGD
V
GATE
Initialization
Limiting
Full On
V
GATE
t
LIM
t
TH
V
RAMP
V
RAMP
V
GATE
inactive
active
V
OUT
V
IN
V
GS(th)
V
GS(lim)
V
EE
t
POR
90%
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