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參數(shù)資料
| 型號： | HT95CXXX |
| 廠商： | Holtek Semiconductor Inc. |
| 英文描述： | CID Type Phone 8-Bit MCU |
| 中文描述： | 刑事偵緝式電話8位微控制器 |
| 文件頁數(shù)： | 11/51頁 |
| 文件大?。?/td> | 384K |
| 代理商： | HT95CXXX |
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HT95CXXX
Rev. 1.50
11
May 26, 2005
Table Location
Any location in the ROM space can be used as look-up
tables. The instructions
TABRDC [m]
(the current
page, one page=256 words) and TABRDL[m] (the last
page)transferthecontentsofthelower-orderbytetothe
specified data memory, and the higher-order byte to
TBLH (08H). For the HT95C400/40P, the instruction
TABRDC [m] is used for any page of any bank. Only
the destination of the lower-order byte in the table is
well-defined, and the higher-order byte of the table word
is transferred to TBLH. The table pointer (TBLP) or
(TBHP, TBLP for the HT95C400/40P) is a read/write
register (07H) or (1FH, 07H for the HT95C400/40P),
which indicates the table location. Before accessing the
table, the location must be placed in the (TBLP) or
(TBHP,TBLPfortheHT95C400/40P).TheTBLHisread
only and cannot be restored. If the main routine and the
ISR (Interrupt Service Routine) both employ the table
read instruction, the contents of the TBLH in the main
routine are likely to be changed by the table read in-
struction used in the ISR. Errors will then occur. Hence,
simultaneously using the table read instruction in the
main routine and the ISR should be avoided. However, if
the table read instruction has to be applied in both the
main routine and the ISR, the interrupt should be dis-
abled prior to the table read instruction. It will not be en-
abled until the TBLH has been backed-up. All table
related instructions require two cycles to complete the
operation. These areas may function as normal pro-
gram memory depending on the requirements.
Stack Register
This is a special part of the memory which is used to
save the contents of the program counter only. The
stack is organized into 12 levels (HT95C400/40P) or 8
levels (HT95C300/30P, HT95C200/20P) and is neither
part of the data nor part of the program space, and is
neither readable nor writable. The activated level is in-
dexed by the stack pointer (SP) and is neither readable
nor writable. At a subroutine call or interrupt acknowl-
edge signal, the contents of the program counter are
pushed onto the stack. At the end of a subroutine or an
interrupt routine, signaled by a return instruction (RET or
RETI), the program counter is restored to its previous
value from the stack. After a chip reset, the SP will point
to the top of the stack. If the stack is full and an interrupt
takes place, the interrupt request flag will be recorded
but the acknowledge signal will be inhibited even if this
interrupt is enabled. When the stack pointer is
decremented(by RET or RETI), the interrupt will be ser-
viced. This feature prevents stack overflow allowing the
programmertousethestructuremoreeasily.Ifthestack
is full and a CALL is subsequently executed, stack
overflow occurs and the first entry will be lost (only the
most recent 12 or 8, depending on various MCU type,
returned addresses are stored).
Data Memory
The data memory is divided into four functional groups:
special function registers, embedded control register,
LCD display memory and general purpose memory.
Most are read/write, but some are read only.
The special function registers are located from 00H to
1FH. The embedded control registers are located in the
memory areas from 20H to 3FH. The remaining spaces
which are not specified in the following table before the
40H are reserved for future expanded usage and read-
ing these locations will get 00H . The general purpose
data memory is divided into 15 banks (HT95C400/40P),
11 banks (HT95C300/30P) or 6 banks (HT95C200/
20P). The banks in the RAM are all addressed from 40H
to 0FFH and they are selected by setting the value of the
bank pointer (BP).
HT95C400/40P
Instruction(s)
Table Location
*13
*12
*11
*10
*9
*8
*7
*6
*5
*4
*3
*2
*1
*0
TABRDC [m]
#5
#4
#3
#2
#1
#0
@7
@6
@5
@4
@3
@2
@1
@0
TABRDL [m]
1
1
1
1
1
1
@7
@6
@5
@4
@3
@2
@1
@0
HT95C300/30P, HT95C200/20P
Instruction(s)
Table Location
*12
*11
*10
*9
*8
*7
*6
*5
*4
*3
*2
*1
*0
TABRDC [m]
P12
P11
P10
P9
P8
@7
@6
@5
@4
@3
@2
@1
@0
TABRDL [m]
1
1
1
1
1
@7
@6
@5
@4
@3
@2
@1
@0
Note: *13~*0: Table location bits
#7~#0: TBHP register bit7~bit0
@7~@0: TBLP register bit7~bit0
P12~P8: Current program counter bits
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HT95L400-128QFP-A | LCD Type Phone 8-Bit MCU |
| HT95L100-64QEP-A | LCD Type Phone 8-Bit MCU |
| HT95L10P-64QEP-A | LCD Type Phone 8-Bit MCU |
| HT95L100-64QFP-A | 8-Bit LCD Type Phone Controller MCU |
| HT95L10P-64QFP-A | 8-Bit LCD Type Phone Controller MCU |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HT95L000 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:CID Type Phone 8-Bit MCU |
| HT95L000-56SSOP-A | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:LCD Type Phone 8-Bit MCU |
| HT95L00P | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:LCD Type Phone 8-Bit MCU |
| HT95L00P-56SSOP-A | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:LCD Type Phone 8-Bit MCU |
| HT95L100 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:CID Type Phone 8-Bit MCU |
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