參數(shù)資料
型號(hào)： HT86384
廠商： Holtek Semiconductor Inc.
英文描述： Voice Synthesizer 8-Bit MCU
中文描述： 語(yǔ)音合成器8位微控制器
文件頁(yè)數(shù)： 25/39頁(yè)
文件大?。?/td> 368K
代理商： HT86384
HT86XXX
Rev. 1.70
25
May 6, 2004
Reset Timing Chart
Reset Circuit
Reset Configuration
The function unit chip reset status are shown below.
PC
000H
Interrupt
Disable
Prescaler
Clear
WDT
Clear. After master reset,
WDT begins counting
Timer/event counter
Off
Input/output ports
Input mode
SP
Points to the top of the stack
Timer/Event Counter 0/1
There are four timer counters are implemented in the
HT86XXX. The Timer/Event Counter 0 and 1 contain
16-bit programmable count-up counters whose clock
may come from an external source or the system clock
divided by 4 (T1). Using the internal instruction clock
(T1), there is only one reference time base. The external
clock input allows the user to count external events,
measure time intervals or pulse width, or to generate an
accurate time base.
There are three registers related to Timer/Event Coun-
ter 0; TMR0H (0CH), TMR0L (0DH), TMR0C (0EH).
Writing to TMR0L only writes the data into a low byte
buffer. Writing to TMR0H will write the data and the con-
tents of the low byte buffer into the Timer/Event Counter
0 preload register (16-bit) simultaneously. The
Timer/Event Counter 0 preload register is changed only
by a write to TMR0H operation. Writing to TMR0L will
keep the Timer/Event Counter 0 preload register un-
changed.
Reading TMR0H will also latch the TMR0L into the low
byte buffer to avoid false timing problems. Reading the
TMR0L only returns the value from the low byte buffer
which may be a previously loaded value. In other words,
thelowbyteofTimer/EventCounter0cannotbereaddi-
rectly. It must read the TMR0H first to ensure that the
low byte contents of Timer/Event Counter 0 are latched
into the buffer.
There are three registers related to the Timer/Event
Counter 1; TMR1H (0FH), TMR1L(10H), TMR1C (11H).
The Timer/Event Counter 1 operates in the same man-
ner as Timer/Event Counter 0.
Label
Bits
Function
0~2 Unused bit, read as 0
TE
3
To define the TMR0/TMR1 active
edge of timer/event counter
(0=active on low to high;
1=active on high to low)
TON
4
To enable/disable timer counting
(0=disabled; 1=enabled)
5
Unused bit, read as 0
TM0,
TM1
6
7
To define the operating mode
(TMR1, TMR0)
01=Eventcountmode(externalclock)
10=Timer mode (internal clock)
11=Pulse width measurement mode
00=Unused
TMR0C/TMR1C Register
Label
Bits
Function
0~2 Unused bit, read as 0
TE
3
To define the TMR0/TMR1 active
edge of timer/event counter
(0=active on low to high;
1=active on high to low)
TON
4
To enable/disable timer counting
(0=disabled; 1=enabled)
5
Unused bit, read as 0
TM0,
TM1
6
7
To define the operating mode
(TMR1, TMR0)
01=Unused
10=Timer mode (internal clock)
11=Unused
00=Unused
TMR2C Register
'
9
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B
9
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