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參數(shù)資料
| 型號： | HT82V842 |
| 廠商： | Holtek Semiconductor Inc. |
| 英文描述： | CCD CDS/PGA/10b-20M-ADC |
| 中文描述： | 防治荒漠化公約CDS/PGA/10b-20M-ADC |
| 文件頁數(shù)： | 9/18頁 |
| 文件大?。?/td> | 161K |
| 代理商： | HT82V842 |
HT82V842
Rev. 1.00
9
July 15, 2004
Register Operations
Control
Operations
D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Mode 1
DOUT timing control
0
DOUT synchronizes to ADCK
1
DOUT synchronizes to OUTCK
OUTCK polarity
0
DOUT changes at OUTCK rising edge
1
DOUT changes at OUTCK falling edge
ADCK polarity
0
Normal operation as timing chart
1
ADCK clock inversion
ADIN connection
0
0
ADIN function OFF
0
1
ADIN signal to PGA
1
x
ADIN signal to ADC
Reserved
0
Reserved
1
Reserved
ADC output
0
Normal operation, ADC data output
1
ADC output high-Z, or logic of STBY
Black level reset
0
Normal operation
1
Black level reset, or logic of RESET
Power down
0
Normal operation
1
Power down, or logic of STBY
Mode 2
Clamp current
0
Normal clamp 50 A
1
Fast clamp 100 A
ADIN clamp
0
Clamp operation active for ADIN
1
No clamp for ADIN
Clamp target
0
0
Normal mode, clamp both REFIN and CCDIN
0
1
Clamp REFIN only
1
0
Clamp CCDIN only
1
1
Clamp off
S/H, enable logic
0
0
Normal operation as timing chart
0
1
S/H control polarity inversion
1
0
Enable control polarity inversion
1
1
Both of S/H and enable inversion
Monitor selection
0
0
Monitor off
0
1
CDS signal to monitor
1
0
PGA output monitor
1
1
Output REFIN and CCDIN
Mode 3
CDS gain control
0
0
CDS gain=odB
0
1
CDS gain=6.02dB
1
0
CDS gain=12.04dB
1
1
CDS gain= 1.94dB
Black loop gain boost
0
Boost control on
1
Always high gain
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| HT82V842-48LQFP-A | CCD CDS/PGA/10b-20M-ADC |
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| HT82V842-48LQFP-A | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:CCD CDS/PGA/10b-20M-ADC |
| HT82V842A | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:10-Bit 20MSPS CCD Analog Signal Processor |
| HT82V863R | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:CCD Digital Signal Processor |
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| HT83-00007 | 制造商:BITECH 制造商全稱:Bi technologies 功能描述:T1/CEPT/ISDN-Pri Telecom Products |
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