HT82K94E/HT82K94A
Rev. 1.50
8
October 11, 2007
It will not be enabled until the TBLH has been backed
up. All table related instructions require two cycles to
complete the operation. These areas may function as
normal program memory depending on the require-
ments.
Once TBHP is enabled, the instruction TABRDC [m]
reads the ROM data as defined by TBLP and TBHP
value. Otherwise, the ROM code option TBHP is dis-
abled, the instruction TABRDC [m] reads the ROM
data as defined by TBLP and the current program
counter bits.
Stack Register
STACK
This is a special part of the memory which is used to
save the contents of the program counter only. The
stack is organized into 8 levels and is neither part of the
data nor part of the program space, and is neither read-
able nor writeable. The activated level is indexed by the
stack pointer (SP) and is neither readable nor writeable.
At a subroutine call or interrupt acknowledge signal, the
contents of the program counter are pushed onto the
stack. At the end of a subroutine or an interrupt routine,
signaled by a return instruction (RET or RETI), the pro-
gram counter is restored to its previous value from the
stack.Afterachipreset,theSPwillpointtothetopofthe
stack.
If the stack is full and a non-masked interrupt takes
place, the interrupt request flag will be recorded but the
acknowledge signal will be inhibited. When the stack
pointer is decremented (by RET or RETI), the interrupt
will be serviced. This feature prevents stack overflow al-
lowing the programmer to use the structure more easily.
In a similar case, if the stack is full and a CALL is sub-
sequently executed, stack overflow occurs and the first
entry will be lost (only the most recent 8 return ad-
dresses are stored).
Data Memory
RAM for Bank 0
The data memory is designed with 255 8 bits. The
data memory is divided into two functional groups: spe-
cial function registers and general purpose data mem-
ory (224 8). Most are read/write, but some are read
only.
The general purpose data memory, addressed from
20H to FFH, is used for data and control information
under instruction commands. All of the data memory
areas can handle arithmetic, logic, increment, decre-
ment and rotate operations directly. Except for some
dedicated bits, each bit in the data memory can be set
and reset by SET [m].i and CLR [m].i . They are also
indirectly accessible through memory pointer registers
(MP0 or MP1).
Data Memory
RAM for Bank 1
The special function registers used in USBinterface are
located in RAM bank 1. In order to access the Bank1
register, only the Indirect addressing pointer MP1 can
be used and the Bank register BP should be set to 1 .
The mapping of RAM bank 1 is as shown.
&
2 (
!
(
9
* ( ,
! :
2 (
!
(
>
>
>
1 >
* >
5 >
4 >
- >
6 >
7 >
>
, >
>
>
>
8 >
>
>
>
1 >
* >
5 >
4 >
- >
6 >
7 >
>
, >
>
>
>
8 >
8 8 >
B (
!
"
" ( ! ( C
C
>
"
(
" "
! !
(
!
(
"
(
" "
! !
(
!
(
,
#
, #
, # >
+
>
#
,
,
, >
,
< (
Bank 0 RAM Mapping
"
%
" D (
!
"
%
( %
( ;
!
E
#
+
# #
"
E
8 8
8 8
8 8
8 8
1
*
>
*
>
*
>
* 1 >
* * >
* 5 >
* 4 >
* - >
* 6 >
* 7 >
*
>
* , >
*
>
8 8 >
Bank 1 RAM Mapping