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參數(shù)資料
| 型號： | HT82A822R_07 |
| 廠商： | Holtek Semiconductor Inc. |
| 英文描述： | USB Audio MCU |
| 中文描述： | USB音頻控制器 |
| 文件頁數(shù)： | 13/39頁 |
| 文件大?。?/td> | 288K |
| 代理商： | HT82A822R_07 |
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HT82A822R
Rev. 1.10
13
June 29, 2007
Register
Reset
(Power On)
WDT
Time-out
(Normal
Operation)
RES Reset
(Normal
Operation)
RES Reset
(HALT)
WDT
Time-Out
(HALT)*
USB-Reset
(Normal)
USB-Reset
(HALT)
FIFO1
xxxx xxxx
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
0000 0000
0000 0000
FIFO2
xxxx xxxx
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
0000 0000
0000 0000
DAC_LIMIT_L
0000 0000
0000 0000
0000 0000
0000 0000
uuuu uuuu
0000 0000
0000 0000
DAC_LIMIT_H
0000 0000
0000 0000
0000 0000
0000 0000
uuuu uuuu
0000 0000
0000 0000
DAC_WR
0000 0000
0000 0000
0000 0000
0000 0000
uuuu uuuu
0000 0000
0000 0000
Note:
* stands for warm reset
u stands for unchanged
x stands for unknown
_ stands for undefined
Timer/Event Counter
Two timer/event counters (TMR0, TMR1) are imple-
mented in the microcontroller. The timer/event counter
0/1 contains a 16-bit programmable count-up counter
and the clock may come from an external source or an
internal clock source. An internal clock source comes
from f
SYS
/4. The external clock input allows the user to
count external events, measure time intervals or pulse
widths, or to generate an accurate time base. There are
six registers related to the Timer/Event Counter 0;
TMR0H (0CH), TMR0L (0DH), TMR0C (0EH) and the
Timer/Event Counter 1; TMR1H (0FH), TMR1L (10H),
TMR1C (11H). For 16-bit timer to write data to TMR0/1L
will only put the written data to an internal lower-order
byte buffer (8-bit) and writing TMR0/1H will transfer the
specified data and the contents of the lower-order byte
buffer to TMR0/1H and TMR0/1L registers. The
Timer/Event Counter 0/1 preload register is changed by
each writing TMR0/1H operations. Reading TMR0/1H
will latch the contents of TMR0/1H and TMR0/1L coun-
ters to the destination and the lower-order byte buffer,
respectively. Reading the TMR0/1L will read the con-
tents of the lower-order byte buffer. The TMR0/1C is the
Timer/Event Counter 0/1 control register, which defines
the operating mode, counting enable or disable and an
active edge.
The TM0 and TM1 bits define the operation mode. The
event count mode is used to count external events,
which means that the clock source is from an external
(TMR0, TMR1) pin. The timer mode functions as a nor-
mal timer with the clock source coming from the internal
clock source. Finally, the pulse width measurement
mode can be used to count the high level or low level du-
ration of the external signal (TMR0, TMR1), and the
counting is based on the internal clock source.
In the event count or timer mode, the timer/event coun-
ter starts counting at the current contents in the
timer/event counter and ends at
FFFFH
. Once an over-
flow occurs, the counter is reloaded from the timer/event
counter preload register, and generates an interrupt re-
quest flag (T0F; bit 5 of INTC0, T1F; bit 6 of INTC0). In
the pulse width measurement mode with the values of
the TON and TE bits equal to 1, after the TMR0 (TMR1)
hasreceivedatransientfromlowtohigh(orhightolowif
the TE bit is 0 ), it will start counting until the TMR0
(TMR1) returns to the original level and resets the TON.
The measured result remains in the timer/event counter
even if the activated transient occurs again. In other
words, only 1-cycle measurement can be made until the
TON is set. The cycle measurement will re-function as
long as it receives further transient pulse. In this opera-
tion mode, the timer/event counter begins counting not
according to the logic level but to the transient edges. In
the case of counter overflows, the counter is reloaded
from the timer/event counter register and issues an in-
terrupt request, as in the other two modes, i.e., event
and timer modes.
To enable the counting operation, the Timer ON bit
(TON; bit 4 of TMR0C or TMR1C) should be set to 1. In
the pulse width measurement mode, TON is automati-
cally cleared after the measurement cycle is completed.
But in the other two modes, the TON can only be reset
by instructions. The overflow of the Timer/Event Coun-
ter 0/1 is one of the wake-up sources. No matter what
the operation mode is, writing a 0 to ET0I or ET1I dis-
ables the related interrupt service.
In the case of timer/event counter OFF condition, writing
data to the timer/event counter preload register also re-
loads that data to the timer/event counter. But if the
timer/event counter is turn on, data written to the
timer/event counter is kept only in the timer/event coun-
ter preload register. The timer/event counter still contin-
ues its operation until an overflow occurs.
When the timer/event counter (reading TMR0/TMR1) is
read, the clock is blocked to avoid errors, as this may re-
sults in a counting error. Blocking of the clock should be
taken into account by the programmer.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| HT82A824R | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:USB Audio MCU |
| HT82A832R | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:USB Audio MCU |
| HT82A832R_07 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:USB Audio MCU |
| HT82A834R | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:USB Audio MCU |
| HT82A836R | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:USB Audio MCU |
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