參數(shù)資料
型號: HT6576A
廠商: Holtek Semiconductor Inc.
英文描述: Advanced SCSI CHIP
中文描述: 高級SCSI芯片
文件頁數(shù): 4/14頁
文件大?。?/td> 412K
代理商: HT6576A
Address 1: Initiator command register
WRITE
7 6 5 4 3 2 1 0
ASSE RT
RST
TRI–STATE RE SE RVE D
ASSE RT
ACK
ASSE RT
BSY
ASSE RT
SE L
ASSE RT
ATN
ASSE RT
DATA
BIT 7: ASSE RT RST
WHE N SE T, THE RST SIGNAL IS ASSE RTE D ON THE SCSI BUS
BIT 6: TRI–STATE (TE ST MODE )
BIT 5: RE SE RVE D (0)
BIT 4: ASSE RT ACK
WHE N SE T, THE ACK SIGNAL IS ASSE RTE D ON THE SCSI BUS
BIT 3: ASSE RT BSY
WHE N SE T, THE BSY SIGNAL IS ASSE RTE D ON THE SCSI BUS
BIT 2: ASSE RT SE L
WHE N SE T, THE SE L SIGNAL IS ASSE RTE D ON THE SCSI BUS
BIT 1: ASSE RT ATN
WHE N SE T, THE ATN SIGNAL IS ASSE RTE D ON THE SCSI BUS
BIT 0: ASSE RT DATA
WHE N SE T, This bit allows the contents of the output data register to be enabled as chip outputs
on SCSI signal DB0–DB7
RE AD
7 6 5 4 3 2 1 0
RE T
ARBIT
PROGRESS
LOST
ARBIT
ACK
BSY
SE L
ATN
ASSE RT
DATA
Address 2: Mode register
RE AD/WRITE
7 6 5 4 3 2 1 0
LOCK
DMA
TARGE T
MODE
E NABLE
PARITY
E NABLE
PARITY
E NABLE
E OP
MONITOR
CHE CK
BUSY
DMA
IRQ
MODE
ARBIT
BIT 7: BLOCK MODE DMA
BIT 6: TARGE T MODE
When set, the chip operates as an SCSI bus target device.
BIT 5: E NABLE PARITY CHE CKING
When set, data received on the SCSI data bus is checked for odd parity.
HT6576A
4
14th J uly ’97
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