HT6230
6
April 19, 2000
logic 1. If the sense input comes from XIN, the
corresponding command code together with
the system code stored in the system latches
are generated.
Two-key system mode
The device goes into this mode by switching
the MS input pin to high state. The pull-high
resistors are only connected to XIN inputs ex-
ceptthefirstscancycle.Inthefirstscancycle,
there only exists pull-high resistors in ZIN in-
puts. In this mode, the legal key operation is
that exactly one XIN and one ZIN are con-
nected to two DRS drivers. In the first scan
duration, it detects which key in Z-key matrix
is pressed and generates an enable signal to
latch the system latches. While in the second
scan duration, it detects which key in the
X-key matrix is pressed and generates an en-
abledsignaltolatchthecommandlatches.Af-
ter being latched, the system and command
codes are transmitted.
Control bit
A control bit is added after two start bits and
willbecomplementedifonekeyisreleased.The
decoder can decide whether the next code is a
new command or not.
Oscillator
The embedded part of the oscillator is an
RC-oscillation circuit. The OSC pin is the input
terminal of the RC-oscillation circuit and is con-
nectedtoanexternalceramicresonator(429kHz).
A resistor of 6.8k
must be in series with the
resonator. The resonator and resistor are
grounded at one side.
Reset (after key release)
In a complete code repetition time, as shown in
the figure below, the following situation of key
release results in a reset action.
During Tsep and debounce time, the device
will reset immediately if a key is released.
During Scan cycle in Tcode, a reset will occur
ifakeyisreleasedinthreecasesdescribedbe-
low:
When one of the key scan drivers is in the
low state
Before that key has been detected
When MS is high and there is no wired con-
nection in Z-key matrix
Test pins (TT1 and TT2)
TherearefourmodesbythecombinationofTT1
and TT2.
TT1
TT2
Mode
0
0
Normal mode
1
1
Reset
1
0
Test mode 1
0
1
Test mode 2
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