參數(shù)資料
型號： HT48RA0A
廠商： Holtek Semiconductor Inc.
英文描述： 8-Bit Remote Type MCU
中文描述： 8位遙控型單片機(jī)
文件頁數(shù)： 3/31頁
文件大小： 328K
代理商： HT48RA0A
D.C. Characteristics
Ta=25 C
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
DD
Conditions
V
DD
Operating Voltage
LVR disabled
2.2
3.6
V
I
DD
Operating Current
3V
No load, f
SYS
=4MHz
0.7
1.5
mA
I
STB
Standby Current
3V
No load, system HALT
1
A
V
IL1
Input Low Voltage for I/O Ports
3V
0
0.3V
DD
V
V
IH1
Input High Voltage for I/O Ports
3V
0.7V
DD
V
DD
V
V
IL2
Input Low Voltage (RES)
3V
0
0.4V
DD
V
V
IH2
Input High Voltage (RES)
3V
0.9V
DD
V
DD
V
I
OL
I/O Ports Sink Current
3V
V
OL
=0.1V
DD
1.5
2.5
mA
I
OH
PC0/REMOutputSourceCurrent
3V
V
OH
=0.9V
DD
1
1.5
mA
R
PH1
Pull-high Resistance of PA Port,
PB0~PB1 and RES
3V
60
k
R
PH2
Pull-highResistanceofPB2~PB7
3V
60
k
A.C. Characteristics
Ta=25 C
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
DD
Conditions
f
SYS
System Clock
3V
400
4000
kHz
t
RES
External Reset Low Pulse Width
1
s
t
SST
System Start-up Timer Period
Power-uporwake-upfromHALT
1024
t
SYS
Note: t
SYS
=1/f
SYS
HT48RA0A
Rev. 1.70
3
July 16, 2003
Functional Description
Execution Flow
The HT48RA0A system clock can be derived from a
crystal/ceramic resonator oscillator. It is internally di-
vided into four non-overlapping clocks. One instruction
cycle consists of four system clock cycles.
Instruction fetching and execution are pipelined in such
a way that a fetch takes one instruction cycle while de-
coding and execution takes the next instruction cycle.
However, the pipelining scheme causes each instruc-
tion to effectively execute within one cycle. If an instruc-
tion changes the program counter, two cycles are
required to complete the instruction.
1
*
1
*
1
*
,
! # 4
# 7
8
9
# 4
# 7
: 8
,
! # 4
# 7
;
8
9
# 4
# 7
8
,
! # 4
# 7
;
8
9
# 4
# 7
;
8
;
;
#
0
<
#
0
Execution flow
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