- 您現(xiàn)在的位置：買賣IC網 > PDF目錄385400 > HT48R30A (Holtek Semiconductor Inc.) 8-BIT MICROCONTROLLER PDF資料下載
參數資料
| 型號： | HT48R30A |
| 廠商： | Holtek Semiconductor Inc. |
| 元件分類： | 數學處理器 |
| 英文描述： | 8-BIT MICROCONTROLLER |
| 中文描述： | 8位微控制器 |
| 文件頁數： | 11/43頁 |
| 文件大?。?/td> | 710K |
| 代理商： | HT48R30A |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁當前第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁
HT48R30A-1
Rev. 1.10
11
July 2, 2001
transferoccursbypushingtheprogramcounter
onto the stack, followed by a branch to a sub-
routine at specified location in the program
memory. Only the program counter is pushed
onto the stack. If the contents of the register or
status register (STATUS) are altered by the in-
terrupt service program which corrupts the de-
sired control sequence, the contents should be
saved in advance.
External interrupts are triggered by a high to
low transition of the INT and the related inter-
ruptrequestflag(EIF;bit4ofINTC)willbeset.
When the interrupt is enabled, the stack is not
full and the external interrupt is active, a sub-
routine call to location 04H will occur. The in-
terrupt request flag (EIF) and EMI bits will be
cleared to disable other interrupts.
The internal timer/event counter interrupt is
initialized by setting the timer/event counter
interrupt request flag (TF; bit 5 of INTC),
caused by a timer overflow. When the interrupt
is enabled, the stack is not full and the TF bit is
set, a subroutine call to location 08H will occur.
The related interrupt request flag (TF) will be
reset and the EMI bit cleared to disable further
interrupts.
Duringtheexecutionofaninterruptsubroutine,
other interrupt acknowledge signals are held
until the "RETI" instruction is executed or the
EMI bit and the related interrupt control bit are
set to 1 (if the stack is not full). To return from
the interrupt subroutine, "RET" or "RETI" may
be invoked. RETI will set the EMI bit to enable
an interrupt service, but RET will not.
Interrupts, occurring in the interval between
the rising edges of two consecutive T2 pulses,
will be serviced on the latter of the two T2
pulses, if the corresponding interrupts are en-
abled. In the case of simultaneous requests the
following table shows the priority that is ap-
plied. These can be masked by resetting the
EMI bit.
No. Interrupt Source Priority Vector
a
External Interrupt
1
04H
b
Timer/event
Counter Overflow
2
08H
The timer/event counter interrupt request flag
(TF), external interrupt request flag (EIF), en-
able timer/event counter interrupt bit (ETI),
enable external interrupt bit (EEI) and enable
master interrupt bit (EMI) constitute an inter-
rupt control register (INTC) which is located at
0BH in the data memory. EMI, EEI, ETI are
Register
Bit No.
Label
Function
INTC
(0BH)
0
EMI
Controls the master (global) interrupt
(1= enabled; 0= disabled)
1
EEI
Controls the external interrupt
(1= enabled; 0= disabled)
2
ETI
Controls the timer/event counter 0 interrupt
(1= enabled; 0= disabled)
3
Unused bit, read as "0"
4
EIF
External interrupt request flag
(1= active; 0= inactive)
5
TF
Internal timer/event counter 0 request flag
(1= active; 0= inactive)
6
Unused bit, read as "0"
7
Unused bit, read as "0"
INTC register
相關PDF資料 |
PDF描述 |
|---|---|
| HT48R31-1 | 8-bit OTP Microcontrollers |
| HT48R31-2 | 8-bit OTP Microcontrollers |
| HT48R50-2(40DIP-A0) | 8-BIT MICROCONTROLLER |
| HT48R50-1(28SKDIP-H0) | 8-BIT MICROCONTROLLER |
| HT48R50-1(40DIP-A0) | 8-BIT MICROCONTROLLER |
相關代理商/技術參數 |
參數描述 |
|---|---|
| HT48R30A-1 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:I/O Type 8-Bit MCU |
| HT48R30A-1_09 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:I/O Type 8-Bit MCU |
| HT48R31 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:8-Bit Microcontroller Series |
| HT48R31(18DIP-A0) | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| HT48R31(20DIP-F0) | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
發(fā)布緊急采購，3分鐘左右您將得到回復。