HT48R06A-1
12
November 29, 2000
be damaged once the "CALL" operates in the in-
terrupt subroutine.
Oscillator configuration
There are two oscillator circuits in the
microcontroller.
Both are designed for system clocks, namely
the RC oscillator and the Crystal oscillator,
which are determined by the ROM code option.
No matter what oscillator type is selected, the
signal provides the system clock. The HALT
mode stops the system oscillator and ignores an
external signal to conserve power.
If an RC oscillator is used, an external resistor
between OSC1 and VDD is required and the
resistance must range from 51k
system clock, divided by 4, is available on
OSC2, which can be used to synchronize exter-
nal logic. The RC oscillator provides the most
cost effective solution. However, the frequency
of oscillation may vary with VDD, tempera-
tures and the chip itself due to process varia-
tions. It is, therefore, not suitable for timing
sensitive operations where an accurate oscilla-
tor frequency is desired.
to 1M . The
If the Crystal oscillator is used, a crystal across
OSC1 and OSC2 is needed to provide the feed-
back and phase shift required for the oscillator,
and no other external components are required.
Instead of a crystal, a resonator can also be con-
nected between OSC1 and OSC2 to get a fre-
quency reference, but two external capacitors
in OSC1 and OSC2 are required (If the oscillat-
ing frequency is less than 1MHz).
The WDT oscillator is a free running on-chip RC
oscillator, and no external components are re-
quired.Evenifthesystementersthepowerdown
mode, the system clock is stopped, but the WDT
oscillator still works with a period of approxi-
mately 65 s/5V. The WDT oscillator can be dis-
abled by ROM code option to conserve power.
Watchdog Timer
WDT
The clock source of WDT is implemented by a
dedicated RC oscillator (WDT oscillator) or in-
struction clock (system clock divided by 4), de-
cided by ROM code option. This timer is
designed to prevent a software malfunction or
sequence from jumping to an unknown location
with unpredictable results. The Watchdog
Timer can be disabled by a ROM code option. If
the Watchdog Timer is disabled, all the execu-
tionsrelatedtotheWDTresultinnooperation.
Once the internal WDT oscillator (RC oscillator
withaperiodof65 s/5Vnormally)isselected,it
is first divided by 256 (8-stage) to get the nomi-
nal time-out period of approximately
16.6ms/5V. This time-out period may vary with
temperatures, VDD and process variations. By
invoking the WDT prescaler, longer time-out
periods can be realized. Writing data to WS2,
WS1,WS0(bit2,1,0oftheWDTS)cangivediffer-
ent time-out periods. If WS2, WS1, and WS0 are
allequalto1,thedivisionratioisupto1:128,and
# 2 % / ' (% & 1 ( ( ' / * #
% & 1 ( ( ' / * #
0 $ . # ' 1 .
)
0 6
System oscillator
2 % / $ , ( * & <
: = 1 /* - . / $ #
"
# $ % & ' ( $ #
: = 1 /* - . / $ #
: / * :
"
1 , $ : * - /
"
* 3 $
0 / 1 * .
$ ( $ & /
"
Watchdog Timer