參數(shù)資料
型號: HT48R05A
廠商: Holtek Semiconductor Inc.
英文描述: 8-Bit OTP Microcontroller
中文描述: 8位微控制器檢察官辦公室
文件頁數(shù): 18/44頁
文件大?。?/td> 294K
代理商: HT48R05A
HT48R05A-1
18
February 25, 2000
Preliminary
put/outputlatchescanbesetorclearedby"SET
[m].i" and "CLR [m].i" (m=12H, 14H or 16H) in-
structions.
Some instructions first input data and then fol-
low the output operations. For example, "SET
[m].i", "CLR [m].i", "CPL [m]", "CPLA[m]" read
the entire port states into the CPU, execute the
defined operations (bit-operation), and then
write the results back to the latches or the accu-
mulator.
Each line of port A has the capability of wak-
ing-up the device. The highest 6-bit of port C and
5 bits of port B are not physically implemented;
on reading them a "0" is returned whereas writ-
ing then results in a no-operation. See Applica-
tion note.
There is a pull-high option available for all I/O
lines. Once the pull-high option is selected, all
I/O lines have pull-high resistors. Otherwise,
the pull-high resistors are absent. It should be
noted that a non-pull-high I/O line operating in
input mode will cause a floating state.
The PB0 and PB1 are pin-shared with BZ and
BZ signal, respectively. If the BZ/BZ option is
selected, the output signal in output mode of
PB0/PB1 will be the PFD signal generated by
timer/event counter overflow signal. The input
mode always remaining its original functions.
Once the BZ/BZ option is selected, the buzzer
output signals are controlled by PB0 data regis-
ter only. The I/O functions of PB0/PB1 are as
shown below.
PB0 I/O
I
I
I
I O O O O O O
PB1 I/O
I O O O I
I I O O O
PB0/PB1 Mode x C B B C B B C B B
PB0 Data
x x 0 1 D 0 1 D
0
0 1
x D x x x x x D
1
x x
I
I
I D 0 B D
0
0 B
PB1 Data
PB0 Pad Status I
PB1 Pad Status I D 0 B I
I I D
1
0 B
Note:
I: input; O: output; D, D
0
, D
1
: data;
B:buzzeroption,BZorBZ; x:don'tcare
C: CMOS output
7
D
. ( 2 8
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' < $ : - 0
7 * . ( 2 8
$ ' 3 ' / ' $ + 1 % / $ #
7
D
. ( 2 8
E
!
E
E
!
E
* . / # * (1 /
' / '- %
"
# 1 / $ * . / # * ($ + 1 % / $ #
4 1 0 $ % $ /
$ ' 3 * . / # * ($ + 1 % / $ #
"
# 1 / $ ' / ' $ + 1 % / $ #
' / '1 /
F
) * #
* . ( 2 D
F
) * #
* . ( 2 D & * . / # * ( F
3 ' / ' # $ + 1 % / $ #
Input/output ports
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