參數(shù)資料
      型號(hào): HT48CA1
      廠商: Holtek Semiconductor Inc.
      英文描述: Remote Type 8-Bit MCU
      中文描述: 遠(yuǎn)程型8位微控制器
      文件頁數(shù): 17/39頁
      文件大?。?/td> 308K
      代理商: HT48CA1
      HT48RA1/HT48CA1
      Rev. 1.00
      17
      June 25, 2004
      After a chip reset, these input/output lines stay at high
      levels (pull-high options) or floating state (non-pull-high
      options). Each bit of these input/output latches can be
      set or cleared by SET[m].i (m=12H, 14H, 16H or 1CH)
      instructions. Some instructions first input data and then
      follow the output operations. For example, SET [m].i ,
      CLR [m].i , CPLA [m] read the entire port states into
      theCPU,executethedefinedoperations(bit-operation),
      and then write the results back to the latches or the ac-
      cumulator.
      Each line of port A has the capability of waking-up the
      device. The highest 2 bits of port C and 7 bits of port F
      are not physically implemented; on reading them a 0 is
      returned whereas writing then results in a no-operation.
      Pull-high resistors of each port are decided by a option
      bit.
      The PB0 is pin-shared with PFD signal, respectively. If
      the PFD option is selected, the output signal in output
      mode of PB0 will be the PFD signal. The input mode al-
      ways remain its original functions. The PF0 and PC0 are
      pin-shared with INT and TMR0. The INT signal is di-
      rectly connected to PF0. The PFD output signal (in out-
      put mode) are controlled by the PB0 data register only.
      The truth table of PB0/PFD is listed below.
      PBC (15H) Bit0
      I
      O
      O
      O
      PB0/PFD option
      x
      PB0
      PFD
      PFD
      PB0 (14H) Bit0
      x
      D
      0
      1
      PB0 pad status
      I
      D
      0
      PFD
      Note:
      I Input
      O Output
      D Data
      Low Voltage Reset
      LVR
      The microcontroller provides low voltage reset circuit in
      order to monitor the supply voltage of the device. If the
      supply voltage of the device is within the range
      0.9V~V
      LVR
      , such as changing a battery, the LVR will au-
      tomatically reset the device internally.
      The LVR includes the following specifications:
      The low voltage (0.9V~V
      LVR
      ) has to remain in their
      original state to exceed 1ms. If the low voltage state
      does not exceed 1ms, the LVR will ignore it and do not
      perform a reset function.
      The LVR uses the OR function with the external
      RES signal to perform chip reset.
      TherelationshipbetweenV
      DD
      andV
      LVR
      isshownbelow.
      C
      C
      C
      0
      C
      0
      C
      * 4
      , & ) ! "
      *
      D
      D
      % ' ! " 4
      +
      ! * , % )
      *
      0
      4
      * * 4
      % " * ! &
      Low Voltage Reset
      Note:
      *1 To make sure that the system oscillator has stabilized, the SST provides an extra delay of 1024 system
      clock pulses before entering the normal operation.
      *2 Sincelowvoltagehastobemaintainedinitsoriginalstateandexceed1ms,therefore1msdelayenters
      the reset mode.
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