參數(shù)資料
型號(hào): HT46C62
廠商: Holtek Semiconductor Inc.
英文描述: A/D with LCD Type 8-Bit MCU
中文描述: 在A / D液晶型8位微控制器
文件頁(yè)數(shù): 7/46頁(yè)
文件大?。?/td> 401K
代理商: HT46C62
HT46R62/HT46C62
Rev. 1.60
7
July 14, 2005
Functional Description
Execution Flow
The system clock is derived from either a crystal or an
RC oscillator or a 32768Hz crystal oscillator. It is inter-
nally divided into four non-overlapping clocks. One in-
struction cycle consists of four system clock cycles.
Instruction fetching and execution are pipelined in such
a way that a fetch takes one instruction cycle while de-
coding and execution takes the next instruction cycle.
The pipelining scheme makes it possible for each in-
struction to be effectively executed in a cycle. If an in-
struction changes the value of the program counter, two
cycles are required to complete the instruction.
Program Counter
PC
The program counter (PC) is 11 bits wide and it controls
the sequence in which the instructions stored in the pro-
gram ROM are executed. The contents of the PC can
specify a maximum of 2048 addresses.
After accessing a program memory word to fetch an in-
struction code, the value of the PC is incremented by 1.
The PC then points to the memory word containing the
next instruction code.
When executing a jump instruction, conditional skip ex-
ecution, loading a PCLregister, a subroutine call, an ini-
tial reset, an internal interrupt, an external interrupt, or
returning from a subroutine, the PC manipulates the
program transfer by loading the address corresponding
to each instruction.
The conditional skip is activated by instructions. Once
the condition is met, the next instruction, fetched during
the current instruction execution, is discarded and a
dummy cycle replaces it to get a proper instruction; oth-
erwise proceed to the next instruction.
Mode
Program Counter
*10
*9
*8
*7
*6
*5
*4
*3
*2
*1
*0
Initial Reset
0
0
0
0
0
0
0
0
0
0
0
External Interrupt 0
0
0
0
0
0
0
0
0
1
0
0
External Interrupt 1
0
0
0
0
0
0
0
1
0
0
0
Timer/Event Counter Overflow
0
0
0
0
0
0
0
1
1
0
0
Time Base Interrupt
0
0
0
0
0
0
1
0
1
0
0
RTC Interrupt
0
0
0
0
0
0
1
1
0
0
0
Skip
Program Counter+2
Loading PCL
*10
*9
*8
@7
@6
@5
@4
@3
@2
@1
@0
Jump, Call Branch
#10
#9
#8
#7
#6
#5
#4
#3
#2
#1
#0
Return From Subroutine
S10
S9
S8
S7
S6
S5
S4
S3
S2
S1
S0
Program Counter
Note:
*10~*0: Program counter bits
#10~#0: Instruction code bits
S10~S0: Stack register bits
@7~@0: PCL bits
0
% (
( :
;
<
(
( :
7 ;
0
% (
( :
=
;
<
(
( :
;
0
% (
( :
=
;
<
(
( :
=
;
=
=
#
(
2
>
( :
(
2 # ;
Execution Flow
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