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參數(shù)資料
| 型號(hào)： | HT36A2 |
| 廠商： | Holtek Semiconductor Inc. |
| 英文描述： | 8-Bit Music Synthesizer MCU |
| 中文描述： | 8位微控制器音樂合成器 |
| 文件頁數(shù)： | 12/24頁 |
| 文件大小： | 215K |
| 代理商： | HT36A2 |
HT36A2
Rev. 1.00
12
June 19, 2003
Power Down Operation
HALT
The HALT mode is initialized by a HALT instruction and
results in the following...
The system oscillator will turn off but the WDT oscilla-
tor keeps running (If the WDT oscillator is selected).
Watchdog Timer
WDT
The contents of the on-chip RAM and registers remain
unchanged
The WDT and WDT prescaler will be cleared and
starts to count again (if the clock comes from the WDT
oscillator).
All I/O ports maintain their original status.
The PD flag is set and the TO flag is cleared.
The HALT pin will output a high level signal to disable
the external ROM.
The system can leave the HALT mode by means of an
external reset, an interrupt, an external falling edge sig-
nal on port A or a WDT overflow. An external reset
causes a device initialization and the WDT overflow per-
forms a warm reset . By examining the TO and PD flags,
the cause for a chip reset can be determined. The PD flag
is cleared when there is a system power-up or by execut-
ing the CLR WDT instruction and it is set when a HALT in-
struction is executed. The TO flag is set if the WDT
time-out occurs, and causes a wake-up that only resets
the PC and SP, the others remain in their original status.
The port A wake-up and interrupt methods can be con-
sidered as a continuation of normal execution. Each bit
in port A can be independently selected to wake-up the
devicebymaskoption.AwakeningfromanI/Oportstim-
ulus, the program will resume execution of the next in-
struction. If awakening from an interrupt, two sequences
may occur. If the related interrupts is disabled or the in-
terrupts is enabled but the stack is full, the program will
resume execution at the next instruction. If the interrupt
is enabled and the stack is not full, a regular interrupt re-
sponse takes place.
Once a wake-up event occurs, it takes 1024 t
SYS
(sys-
tem clock period) to resume to normal operation. In
other words, a dummy cycle period will be inserted after
the wake-up. If the wake-up results from an interrupt ac-
knowledge, the actual interrupt subroutine will be de-
layed by one more cycle. If the wake-up results in next
instruction execution, this will execute immediately after
a dummy period has finished. If an interrupt request flag
is set to
wake-upfunctionoftherelatedinterruptwillbedisabled.
1
before entering the HALT mode, the
To minimize power consumption, all I/O pins should be
carefully managed before entering the HALT status.
Reset
There are 3 ways in which a reset can occur:
RES reset during normal operation
RES reset during HALT
WDT time-out reset during normal operation
The WDT time-out during HALT is different from other
chip reset conditions, since it can perform a warm re -
set that just resets the PC and SP, leaving the other cir-
cuits to maintain their state. Some registers remain un-
changed during any other reset conditions. Most
registers are reset to the initial condition when the re-
set conditions are met. By examining the PD and TO
flags, the program can distinguish between different
chip resets .
TO
PD
RESET Conditions
0
0
RES reset during power-up
u
u
RES reset during normal operation
0
1
RES wake-up HALT
1
u
WDT time-out during normal operation
1
1
WDT wake-up HALT
Note: u stands for unchanged
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Reset timing chart
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Reset circuit
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6
Reset configuration
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相關(guān)代理商/技術(shù)參數(shù) |
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| HT36A3 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:8-Bit Music Synthesizer MCU |
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