參數(shù)資料
型號(hào)： HSP50215VI
廠商： HARRIS SEMICONDUCTOR
元件分類(lèi)： 通信及網(wǎng)絡(luò)
英文描述： Digital UpConverter
中文描述： SPECIALTY TELECOM CIRCUIT, PQFP100
文件頁(yè)數(shù)： 18/21頁(yè)
文件大?。?/td> 157K
代理商： HSP50215VI
3-439
CONTROL ADDRESS 20: SPARE
BIT
POSITION
FUNCTION
DESCRIPTION
15-0
Reserved (Note 1)
Reserved (Note 1).
CONTROL ADDRESS 21: RESET CONTROL
BIT
POSITION
FUNCTION
DESCRIPTION
15-0
Reset
RST. Writing to this registers will reset this part.
CONTROL ADDRESS 22: SYNC CONTROL
BIT
POSITION
FUNCTION
DESCRIPTION
15-2
Reserved (Note 1)
Reserved (Note 1).
1
External Sync Polarity
SYNCPOL.
0 defines a Sync assertion as a transition from a logic low to a logic high; 1 defines a Sync assertion
as a transition from a logic high to a logic low:
0
Sync Select
SYNCSEL. 0 = Sync via a Write to Control Word 3; 1 = Sync via SYNCIN control input.
CONTROL WORDS 23: TEST CONTROL
BIT
POSITION
FUNCTION
DESCRIPTION
15-0
Reserved (Note 1)
Reserved (Note 1).
CONTROL WORDS 512-767: I CHANNEL POLY-PHASE COEFFICIENTS 512-767 (0X200H = 0X2FFH)
BIT
POSITION
FUNCTION
DESCRIPTION
15:0
I Coefficients
ICOEFFICIENTS(15:0). Coefficients are loaded from the first coefficient (C0) in address 0x200h to the
last address in 0x2FFh. The convolution multiplies C0 by the most recent data sample. For a 16 tap,
interpolate-by-4 filter, the calculations are:
OUTPUT0 = (C0*D[n]) + (C4*D[n-1]) + (C8*D[n-2]) + (C12*D[n-3]).
OUTPUT1 = (C1*D[n]) + (C5*D[n-1]) + (C9*D[n-2]) + (C13*D[n-3]).
OUTPUT2 = (C2*D[n]) + (C6*D[n-1]) + (C10*D[n-2]) + (C14*D[n-3]).
OUTPUT3 = (C3*D[n]) + (C7*D[n-1]) + (C11*D[n-2]) + (C15*D[n-3]).
See Microprocessor Write section for more detail.
0 =
1 =
CONTROL WORDS 768-1023: Q CHANNEL POLY-PHASE COEFFICIENTS 768-1023 (0X300H = 0X3FFH)
BIT
POSITION
FUNCTION
DESCRIPTION
15:0
Q Coefficients
QCOEFFICIENTS(15:0). Coefficients are loaded from the first coefficient (B0) in address 0x300h to
the last address in 0x3FFh. The convolution multiplies B0 by the most recent data sample. For a 16
tap, interpolate-by-4 filter, the calculations are:
OUTPUT0 = (B0*D[n]) + (B4*D[n-1]) + (B8*D[n-2]) + (B12*D[n-3]).
OUTPUT1 = (B1*D[n]) + (B5*D[n-1]) + (B9*D[n-2]) + (B13*D[n-3]).
OUTPUT2 = (B2*D[n]) + (B6*D[n-1]) + (B10*D[n-2]) + (B14*D[n-3]).
OUTPUT3 = (B3*D[n]) + (B7*D[n-1]) + (B11*D[n-2]) + (B15*D[n-3]).
See Microprocessor Write section for more detail.
NOTE:
1. Reserved bits should be set to logic 0.
HSP50215
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參數(shù)描述
HSP50216 制造商:INTERSIL 制造商全稱(chēng):Intersil Corporation 功能描述:Four-Channel Programmable Digital Downconverter
HSP50216_06 制造商:INTERSIL 制造商全稱(chēng):Intersil Corporation 功能描述:Four-Channel Programmable Digital DownConverter
HSP50216_07 制造商:INTERSIL 制造商全稱(chēng):Intersil Corporation 功能描述:Four-Channel Programmable Digital Downconverter
HSP50216KI 功能描述:上下轉(zhuǎn)換器 MULTI-CHANNEL PROGRAMMABLE DOW CONVERTER,BGA PKG,IND TEMP RoHS:否 制造商:Texas Instruments 產(chǎn)品:Down Converters 射頻:52 MHz to 78 MHz 中頻:300 MHz LO頻率: 功率增益: P1dB: 工作電源電壓:1.8 V, 3.3 V 工作電源電流:120 mA 最大功率耗散:1 W 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFP-128
HSP50216KIZ 功能描述:上下轉(zhuǎn)換器 MULTI-CH PROGRAM CONV BGA PKG IND RoHS:否 制造商:Texas Instruments 產(chǎn)品:Down Converters 射頻:52 MHz to 78 MHz 中頻:300 MHz LO頻率: 功率增益: P1dB: 工作電源電壓:1.8 V, 3.3 V 工作電源電流:120 mA 最大功率耗散:1 W 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFP-128
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