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參數(shù)資料
| 型號： | HSDL-3603-208 |
| 廠商： | Avago Technologies Ltd. |
| 英文描述： | IrDA㈢ Data Compliant 4 Mbit/s Infrared Transceiver |
| 中文描述： | 紅外線㈢數(shù)據(jù)符合4 Mbit / s的紅外收發(fā)器 |
| 文件頁數(shù)： | 4/29頁 |
| 文件大?。?/td> | 226K |
| 代理商： | HSDL-3603-208 |
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4
Bandwidth Selection Timing
The transceiver is in default SIR/
MIR mode when powered on.
User needs to apply the following
programming sequence to both
the SD and TXD inputs to enable
the transceiver to operate at FIR
mode.
Figure 3. Bandwidth selection timing at SIR/MIR mode.
Figure 4. Bandwidth selection timing at FIR mode.
Setting the transceiver to SIR/MIR
Mode (9.6 kb/s to 1.152 Mbit/s)
1. Set SD/Mode input to logic
HIGH
2. TXD input should remain at
logic LOW
3. After waiting for t
S
≥
25 ns,
set SD/Mode to logic LOW, the
HIGH to LOW negative edge
transition will determine the
receiver bandwidth
4. Ensure that TXD input remains
low for t
H
≥
100 ns, the
receiver is now in SIR/MIR
mode
5. SD input pulse width for mode
selection should be > 50 ns.
V
IH
50%
t
S
t
H
V
IL
50%
50%
TXD
SD/MODE
V
IL
V
IH
50%
t
S
t
H
V
IL
50%
50%
TXD
SD/MODE
V
IH
V
IL
Setting the transceiver to FIR
(4.0 Mbit/s) Mode
1. Set SD/Mode input to logic
HIGH
2. After SD/Mode input remains
HIGH at > 25ns, set TXD input
to logic HIGH, wait t
S
≥
25 ns
(from 50% of TXD rising edge
till 50% of SD falling edge)
3. Then set SD/Mode to logic
LOW, the HIGH to LOW
negative edge transition will
determine the receiver
bandwidth
4. After waiting for t
H
≥
100ns, set
the TXD input to logic LOW
5. SD input pulse width mode
selection should be > 50ns.
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