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參數(shù)資料
| 型號(hào)： | HS9-82C54RH |
| 廠商： | Intersil Corporation |
| 英文描述： | Radiation Hardened CMOS Programmable Interval Timer |
| 中文描述： | 輻射加固CMOS可編程間隔定時(shí)器 |
| 文件頁數(shù)： | 19/21頁 |
| 文件大?。?/td> | 171K |
| 代理商： | HS9-82C54RH |
966
HS-82C54RH
Operation Common to All Modes
Programming
When a Control Word is written to a Counter, all Control
Logic is immediately reset and OUT goes to a known initial
state; no CLK pulses are required for this.
Gate
The GATE input is always sampled on the rising edge of
CLK. In Modes 0, 2, 3 and 4 the GATE input is level
sensitive, and logic level is sampled on the rising edge of
CLK. In modes 1, 2, 3 and 5 the GATE input is rising-edge
sensitive. In these Modes, a rising edge of Gate (trigger)
sets an edge-sensitive flip-flop in the Counter. This flip-flop is
then sampled on the next rising edge of CLK. The flip-flop is
reset immediately after it is sampled. In this way, a trigger
will be detected no matter when it occurs - a high logic level
does not have to be maintained until the next rising edge of
CLK. Note that in Modes 2 and 3, the GATE input is both
edge-and level-sensitive.
Counter
New counts are loaded and Counters are decremented on
the falling edge of CLK.
The largest possible initial count is 0; this is equivalent to 2
16
for binary counting and 10
4
for BCD counting.
The Counter does not stop when it reaches zero. In Modes
0, 1, 4 and 5 the Counter “wraps around” to the highest
count, either FFFF hex for binary counting or 9999 for BCD
counting, and continues counting. Modes 2 and 3 are
periodic; the Counter reloads itself with the initial count and
continues counting from there.
GATE PIN OPERATIONS SUMMARY
SIGNAL
STATUS
MODES
LOW OR GOING
LOW
RISING
HIGH
0
Disables counting
-
Enables
counting
1
-
1) Initiates count-
ing
2) Resets output
after next clock
-
2
1) Disables counting
2) Sets output imme-
diately high
Initiates counting
Enables
counting
3
1) Disables counting
2) Sets output imme-
diately high
Initiates counting
Enables
counting
4
1) Disables counting
-
Enables
counting
5
-
Initiates counting
-
MINIMUM AND MAXIMUM INITIAL COUNTS
MODE
MIN COUNT
MAX COUNT
0
1
0
1
1
0
2
2
0
3
2
0
4
1
0
5
1
0
NOTE: 0 is equivalent to 2
16
for binary counting and 10
4
for BCD
counting.
Spec Number
518059
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PDF描述 |
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| HS1-82C54RH-8 | Radiation Hardened CMOS Programmable Interval Timer |
| HS9-82C54RH-8 | Radiation Hardened CMOS Programmable Interval Timer |
| HS1-82C54RH-Q | Radiation Hardened CMOS Programmable Interval Timer |
| HS9-82C54RH-Q | Radiation Hardened CMOS Programmable Interval Timer |
| HS1-82C55ARH | Radiation Hardened CMOS Programmable Peripheral Interface |
相關(guān)代理商/技術(shù)參數(shù) |
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| HS9-82C54RH-8 | 制造商:Intersil Corporation 功能描述:PROGRAMMABLE TIMER SGL 24PIN CFLATPACK - Bulk |
| HS9-82C54RH-Q | 制造商:Intersil Corporation 功能描述:PROGRAMMABLE TIMER SGL 24CFPAK - Bulk |
| HS9-82C85RH | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened CMOS Static Clock Controller/Generator |
| HS9-82C85RH/PROTO | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened CMOS Static Clock Controller/Generator |
| HS9-82C85RH-8 | 制造商:Intersil Corporation 功能描述:CLOCK CNTRLR/GENERATOR 24PIN CFLATPACK - Bulk |
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