參數(shù)資料
型號: HN58V256AI
廠商: Hitachi,Ltd.
英文描述: 256 k EEPROM (32-kword ×8-bit)(256k EEPROM (32k字 ×8位))
中文描述: 256畝的EEPROM(32 KWord的× 8位)(256k的EEPROM(32K的字× 8位))
文件頁數(shù): 7/20頁
文件大?。?/td> 144K
代理商: HN58V256AI
HN58V256AI Series
7
Write Cycle
Parameter
Symbol
Min
*
2
Typ
Max
Unit
Test conditions
Address setup time
t
AS
t
AH
t
CS
t
CH
t
WS
t
WH
t
OES
t
OEH
t
DS
t
DH
t
WP
t
CW
t
DL
t
BLC
t
BL
t
WC
t
DW
0
ns
Address hold time
CE
to write setup time (
WE
controlled)
CE
hold time (
WE
controlled)
WE
to write setup time (
CE
controlled)
WE
hold time (
CE
controlled)
OE
to write setup time
OE
hold time
50
ns
0
ns
0
ns
0
ns
0
ns
0
ns
0
ns
Data setup time
70
ns
Data hold time
WE
pulse width (
WE
controlled)
CE
pulse width (
CE
controlled)
0
ns
200
ns
200
ns
Data latch time
100
ns
Byte load cycle
0.3
30
μ
s
μ
s
Byte load window
100
Write cycle time
10*
3
ms
Write start time
Notes: 1. t
is defined as the time at which the outputs achieve the open circuit conditions and are no
longer driven.
2. Use this device in longer cycle than this value.
3. t
must be longer than this value unless polling techniques is used. This device automatically
completes the internal write operation within this value.
4. Next read or write operation can be initiated after t
DW
if polling techniques is used.
5. A16 through A14 are page addresses and these addresses are latched at the first falling edge of
WE
.
6. A16 through A14 are page addresses and these addresses are latched at the first falling edge of
CE
.
7. See AC read Characteristics.
0*
4
ns
相關(guān)PDF資料
PDF描述
HN58V256A 256k EEPROM (32-kword x 8-bit) Ready/Busy and RES function (HN58V257A)
HN58V256AFP-12 256k EEPROM (32-kword x 8-bit) Ready/Busy and RES function (HN58V257A)
HN58V256AT-12 256k EEPROM (32-kword x 8-bit) Ready/Busy and RES function (HN58V257A)
HN58V257AT-12 256k EEPROM (32-kword x 8-bit) Ready/Busy and RES function (HN58V257A)
HN58V257A 256k EEPROM (32-kword ×8-bit)(256k EEPROM (32k字 ×8位))
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