參數(shù)資料
型號(hào): HN58V256A
廠商: Hitachi,Ltd.
英文描述: 256k EEPROM (32-kword x 8-bit) Ready/Busy and RES function (HN58V257A)
中文描述: 256k的EEPROM(32 KWord的× 8位)就緒/忙和RES功能(HN58V257A)
文件頁(yè)數(shù): 16/24頁(yè)
文件大小: 118K
代理商: HN58V256A
HN58V256A Series, HN58V257A Series
16
Functional Description
Automatic Page Write
Page-mode write feature allows 1 to 64 bytes of data to be written into the EEPROM in a single write cycle.
Following the initial byte cycle, an additional 1 to 63 bytes can be written in the same manner. Each
additional byte load cycle must be started within 30 μs from the preceding falling edge of
WE
or
CE
. When
CE
or
WE
is high for 100 μs after data input, the EEPROM enters write mode automatically and the input
data are written into the EEPROM.
Data
Polling
Data
polling indicates the status that the EEPROM is in a write cycle or not. If EEPROM is set to read mode
during a write cycle, an inversion of the last byte of data outputs from I/O7 to indicate that the EEPROM is
performing a write operation.
RDY/
Busy
Signal (
only the HN58V257A series
)
RDY/
Busy
signal also allows the status of the EEPROM to be determined. The RDY/
Busy
signal has high
impedance except in write cycle and is lowered to V
OL
after the first write signal. At the end of a write cycle,
the RDY/
Busy
signal changes state to high impedance.
RES
Signal (
only the HN58V257A series
)
When
RES
is low, the EEPROM cannot be read or programmed. Therefore, data can be protected by keeping
RES
low when V
CC
is switched.
RES
should be high during read and programming because it doesn't provide
a latch function.
V
Program inhibit
CC
RES
Program inhibit
Read inhibit
Read inhibit
相關(guān)PDF資料
PDF描述
HN58V256AFP-12 256k EEPROM (32-kword x 8-bit) Ready/Busy and RES function (HN58V257A)
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HN58V257AT-12 256k EEPROM (32-kword x 8-bit) Ready/Busy and RES function (HN58V257A)
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