參數(shù)資料
型號: HN58S65A
廠商: Hitachi,Ltd.
英文描述: 64 k EEPROM (8-kword ×8-bit)(64 k EEPROM (8k字 ×8位))
中文描述: 64畝的EEPROM(8 KWord的× 8位)(64畝的EEPROM(8K的字× 8位))
文件頁數(shù): 6/19頁
文件大小: 144K
代理商: HN58S65A
HN58S65A Series
6
Write Cycle
Parameter
Symbol
Min*
2
Typ
Max
Unit
Test
conditions
Address setup time
t
AS
t
AH
t
CS
t
CH
t
WS
t
WH
t
OES
t
OEH
t
DS
t
DH
t
WP
t
CW
t
DL
t
BLC
t
BL
t
WC
t
DB
t
DW
0
ns
Address hold time
150
ns
&(
to write setup time (
:(
controlled)
0
ns
&(
hold time (
:(
controlled)
0
ns
:(
to write setup time (
&(
controlled)
0
ns
:(
hold time (
&(
controlled)
0
ns
2(
to write setup time
0
ns
2(
hold time
0
ns
Data setup time
150
ns
Data hold time
0
ns
:(
pulse width (
:(
controlled)
200
ns
&(
pulse width (
&(
controlled)
200
ns
Data latch time
200
ns
Byte load cycle
0.4
30
μs
Byte load window
100
μs
Write cycle time
15*
3
ms
Time to device busy
120
ns
Write start time
Notes: 1. t
is defined as the time at which the outputs achieve the open circuit conditions and are no
longer driven.
2. Use this device in longer cycle than this value.
3. t
must be longer than this value unless polling techniques or RDY/
%XV\
are used. This device
automatically completes the internal write operation within this value.
4. Next read or write operation can be initiated after t
DW
if polling techniques or RDY/
%XV\
are
used.
5. A6 through A12 are page addresses and these addresses are latched at the first falling edge of
:(
.
6. A6 through A12 are page addresses and these addresses are latched at the first falling edge of
&(
.
7. See AC read characteristics.
0*
4
ns
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